From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A70E9C388F7 for ; Fri, 13 Nov 2020 14:44:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 47C4C21D1A for ; Fri, 13 Nov 2020 14:44:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726536AbgKMOoH (ORCPT ); Fri, 13 Nov 2020 09:44:07 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:53358 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726267AbgKMOoH (ORCPT ); Fri, 13 Nov 2020 09:44:07 -0500 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kdaIz-006rmR-72; Fri, 13 Nov 2020 15:44:01 +0100 Date: Fri, 13 Nov 2020 15:44:01 +0100 From: Andrew Lunn To: Arnd Bergmann Cc: Jernej =?utf-8?Q?=C5=A0krabec?= , Ard Biesheuvel , Daniel Thompson , Sumit Garg , Alex =?iso-8859-1?Q?Benn=E9e?= , Masami Hiramatsu , Steve McIntyre , "open list:BPF JIT for MIPS (32-BIT AND 64-BIT)" , Willy Liu , "David S. Miller" , Jakub Kicinski , Sasha Levin , Florian Fainelli , Heiner Kallweit , Masahisa Kojima , Ilias Apalodimas Subject: Re: Re: realtek PHY commit bbc4d71d63549 causes regression Message-ID: <20201113144401.GM1456319@lunn.ch> References: <20201017230226.GV456889@lunn.ch> <20201029143934.GO878328@lunn.ch> <20201029144644.GA70799@apalos.home> <2697795.ZkNf1YqPoC@kista> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > > Sadly, there is one board - Pine64 Plus - where HW settings are wrong and it > > actually needs SW override. Until this Realtek PHY driver fix was merged, it > > was unclear what magic value provided by Realtek to board manufacturer does. > > > > Reference: > > https://lore.kernel.org/netdev/20191001082912.12905-3-icenowy@aosc.io/ > > I have merged the fixes from the allwinner tree now, but I still think we > need something better than this, as the current state breaks any existing > dtb file that has the incorrect values, and this really should not have been > considered for backporting to stable kernels. Hi Arnd This PHY driver bug hiding DT bug is always hard to handle. We have been though it once before with the Atheros PHY. All the buggy DT files were fixed in about one cycle. Now that we know there is a board which really does want rgmii when it says rgmii, we cannot simply ignore it in the PHY driver. But the whole story is muddy because of the backport to stable. It might make sense to revert the stable change, and just leave HEAD broken. That then gives people more time to fix DT blobs. But we have to consider Pine64 Plus, are we happy breaking that for a while, when it is actually doing everything correct, and is bug free? Andrew