From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DB57AC5519F for ; Thu, 19 Nov 2020 00:29:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7A709246E7 for ; Thu, 19 Nov 2020 00:29:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726300AbgKSA3S (ORCPT ); Wed, 18 Nov 2020 19:29:18 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:36928 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725947AbgKSA3S (ORCPT ); Wed, 18 Nov 2020 19:29:18 -0500 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kfXp5-007pZ3-TU; Thu, 19 Nov 2020 01:29:15 +0100 Date: Thu, 19 Nov 2020 01:29:15 +0100 From: Andrew Lunn To: Michael Grzeschik Cc: netdev@vger.kernel.org, f.fainelli@gmail.com, davem@davemloft.net, kernel@pengutronix.de, matthias.schiffer@ew.tq-group.com, woojung.huh@microchip.com, UNGLinuxDriver@microchip.com Subject: Re: [PATCH 06/11] net: dsa: microchip: ksz8795: use phy_port_cnt where possible Message-ID: <20201119002915.GJ1804098@lunn.ch> References: <20201118220357.22292-1-m.grzeschik@pengutronix.de> <20201118220357.22292-7-m.grzeschik@pengutronix.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201118220357.22292-7-m.grzeschik@pengutronix.de> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > case BR_STATE_DISABLED: > data |= PORT_LEARN_DISABLE; > - if (port < SWITCH_PORT_NUM) > + if (port < dev->phy_port_cnt) > member = 0; > break; So this, unlike all the other patches so far, is not obviously correct. What exactly does phy_port_cnt mean? Can there be ports without PHYs? What if the PHYs are external? You still need to be able to change the STP state of such ports. Andrew