From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: stefanc@marvell.com
Cc: netdev@vger.kernel.org, thomas.petazzoni@bootlin.com,
davem@davemloft.net, nadavh@marvell.com, ymarkman@marvell.com,
linux-kernel@vger.kernel.org, kuba@kernel.org, mw@semihalf.com,
antoine.tenart@bootlin.com, andrew@lunn.ch
Subject: Re: [PATCH v1] net: mvpp2: divide fifo for dts-active ports only
Date: Mon, 23 Nov 2020 15:10:49 +0000 [thread overview]
Message-ID: <20201123151049.GV1551@shell.armlinux.org.uk> (raw)
In-Reply-To: <1606143160-25589-1-git-send-email-stefanc@marvell.com>
Hi,
On Mon, Nov 23, 2020 at 04:52:40PM +0200, stefanc@marvell.com wrote:
> From: Stefan Chulski <stefanc@marvell.com>
>
> Tx/Rx FIFO is a HW resource limited by total size, but shared
> by all ports of same CP110 and impacting port-performance.
> Do not divide the FIFO for ports which are not enabled in DTS,
> so active ports could have more FIFO.
>
> The active port mapping should be done in probe before FIFO-init.
It would be nice to know what the effect is from this - is it a
small or large boost in performance?
What is the effect when the ports on a CP110 are configured for
10G, 1G, and 2.5G in that order, as is the case on the Macchiatobin
board?
Thanks.
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTP is here! 40Mbps down 10Mbps up. Decent connectivity at last!
next prev parent reply other threads:[~2020-11-23 15:11 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-23 14:52 [PATCH v1] net: mvpp2: divide fifo for dts-active ports only stefanc
2020-11-23 15:10 ` Russell King - ARM Linux admin [this message]
2020-11-23 15:26 ` [EXT] " Stefan Chulski
2020-11-23 15:33 ` Russell King - ARM Linux admin
2020-11-23 15:44 ` Stefan Chulski
2020-11-23 15:51 ` Russell King - ARM Linux admin
2020-11-23 16:03 ` Stefan Chulski
2020-11-23 17:30 ` Russell King - ARM Linux admin
2020-11-23 17:48 ` Stefan Chulski
2020-11-23 15:30 ` Russell King - ARM Linux admin
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