From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B2BB9C3E8C5 for ; Sun, 29 Nov 2020 17:17:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 7A0B121D46 for ; Sun, 29 Nov 2020 17:17:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727930AbgK2RR1 (ORCPT ); Sun, 29 Nov 2020 12:17:27 -0500 Received: from vps0.lunn.ch ([185.16.172.187]:55510 "EHLO vps0.lunn.ch" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725830AbgK2RR0 (ORCPT ); Sun, 29 Nov 2020 12:17:26 -0500 Received: from andrew by vps0.lunn.ch with local (Exim 4.94) (envelope-from ) id 1kjQJO-009NNW-Vv; Sun, 29 Nov 2020 18:16:34 +0100 Date: Sun, 29 Nov 2020 18:16:34 +0100 From: Andrew Lunn To: Steen Hegelund Cc: "David S. Miller" , Jakub Kicinski , Masahiro Yamada , Lars Povlsen , Bjarni Jonasson , Microchip Linux Driver Support , Alexandre Belloni , Microsemi List , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 2/3] net: sparx5: Add Sparx5 switchdev driver Message-ID: <20201129171634.GD2234159@lunn.ch> References: <20201127133307.2969817-1-steen.hegelund@microchip.com> <20201127133307.2969817-3-steen.hegelund@microchip.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20201127133307.2969817-3-steen.hegelund@microchip.com> Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org > diff --git a/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c b/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c > new file mode 100644 > index 000000000000..a91dd9532f1c > --- /dev/null > +++ b/drivers/net/ethernet/microchip/sparx5/sparx5_ethtool.c > @@ -0,0 +1,1027 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* Microchip Sparx5 Switch driver > + * > + * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries. > + */ > + > +#include > + > +#include "sparx5_main.h" > +#include "sparx5_port.h" > + > +/* Add a potentially wrapping 32 bit value to a 64 bit counter */ > +static inline void sparx5_update_counter(u64 *cnt, u32 val) > +{ > + if (val < (*cnt & U32_MAX)) > + *cnt += (u64)1 << 32; /* value has wrapped */ > + > + *cnt = (*cnt & ~(u64)U32_MAX) + val; > +} No inline functions in C files. Let the compiler decide. And i now think i get what this is doing. But i'm surprised at the hardware. Normally registers like this which are expected to wrap around, reset to 0 on read. Andrew