From: Marc Kleine-Budde <mkl@pengutronix.de>
To: Dario Binacchi <dariobin@libero.it>
Cc: linux-kernel@vger.kernel.org,
"David S. Miller" <davem@davemloft.net>,
Gianluca Falavigna <gianluca.falavigna@inwind.it>,
Jakub Kicinski <kuba@kernel.org>,
Oliver Hartkopp <socketcan@hartkopp.net>,
Vincent Mailhol <mailhol.vincent@wanadoo.fr>,
Wolfgang Grandegger <wg@grandegger.com>,
linux-can@vger.kernel.org, netdev@vger.kernel.org
Subject: Re: [PATCH 3/3] can: c_can: cache frames to operate as a true FIFO
Date: Mon, 10 May 2021 14:36:08 +0200 [thread overview]
Message-ID: <20210510123608.wywx3bb3vrgkzq2o@pengutronix.de> (raw)
In-Reply-To: <20210510122512.5lcvvvwzk6ujamzb@pengutronix.de>
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On 10.05.2021 14:25:15, Marc Kleine-Budde wrote:
> On 09.05.2021 14:43:09, Dario Binacchi wrote:
> > As reported by a comment in the c_can_start_xmit() this was not a FIFO.
> > C/D_CAN controller sends out the buffers prioritized so that the lowest
> > buffer number wins.
> >
> > What did c_can_start_xmit() do if it found tx_active = 0x80000000 ? It
> > waited until the only frame of the FIFO was actually transmitted by the
> > controller. Only one message in the FIFO but we had to wait for it to
> > empty completely to ensure that the messages were transmitted in the
> > order in which they were loaded.
> >
> > By storing the frames in the FIFO without requiring its transmission, we
> > will be able to use the full size of the FIFO even in cases such as the
> > one described above. The transmission interrupt will trigger their
> > transmission only when all the messages previously loaded but stored in
> > less priority positions of the buffers have been transmitted.
>
> The algorithm you implemented looks a bit too complicated to me. Let me
> sketch the algorithm that's implemented by several other drivers.
>
> - have a power of two number of TX objects
> - add a number of objects to struct priv (tx_num)
> (or make it a define, if the number of tx objects is compile time fixed)
> - add two "unsigned int" variables to your struct priv,
> one "tx_head", one "tx_tail"
> - the hard_start_xmit() writes to priv->tx_head & (priv->tx_num - 1)
> - increment tx_head
> - stop the tx_queue if there is no space or if the object with the
> lowest prio has been written
> - in TX complete IRQ, handle priv->tx_tail object
> - increment tx_tail
> - wake queue if there is space but don't wake if we wait for the lowest
> prio object to be TX completed.
>
> Special care needs to be taken to implement that lock-less and race
> free. I suggest to look the the mcp251xfd driver.
After converting the driver to the above outlined implementation it
should be more straight forward to add the caching you implemented.
regards,
Marc
--
Pengutronix e.K. | Marc Kleine-Budde |
Embedded Linux | https://www.pengutronix.de |
Vertretung West/Dortmund | Phone: +49-231-2826-924 |
Amtsgericht Hildesheim, HRA 2686 | Fax: +49-5121-206917-5555 |
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next prev parent reply other threads:[~2021-05-10 12:41 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-09 12:43 [PATCH 0/3] can: c_can: cache frames to operate as a true FIFO Dario Binacchi
2021-05-09 12:43 ` [PATCH 1/3] can: c_can: remove the rxmasked unused variable Dario Binacchi
2021-05-10 13:29 ` Marc Kleine-Budde
2021-05-09 12:43 ` [PATCH 2/3] can: c_can: add ethtool support Dario Binacchi
2021-05-10 13:28 ` Marc Kleine-Budde
2021-05-09 12:43 ` [PATCH 3/3] can: c_can: cache frames to operate as a true FIFO Dario Binacchi
2021-05-10 12:25 ` Marc Kleine-Budde
2021-05-10 12:36 ` Marc Kleine-Budde [this message]
2021-05-13 11:23 ` Dario Binacchi
2021-06-06 20:17 [PATCH 0/3] " Dario Binacchi
2021-06-06 20:17 ` [PATCH 3/3] " Dario Binacchi
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