[PATCH v3 0/7] remove different PHY fixups

[PATCH v3 0/7] remove different PHY fixups

[Oleksij Rempel]

changes v3:
- split arch and dts changes

changes v2:
- rebase against latest kernel
- fix networking on RIoTBoard

This patch series tries to remove most of the imx6 and imx7 board
specific PHY configuration via fixup, as this breaks the PHYs when
connected to switch chips or USB Ethernet MACs.

Each patch has the possibility to break boards, but contains a
recommendation to fix the problem in a more portable and future-proof
way.

Oleksij Rempel (7):
  ARM i.MX6q: remove PHY fixup for KSZ9031
  ARM i.MX6q: remove part of ar8031_phy_fixup()
  ARM i.MX6q: remove BMCR_PDOWN handler in ar8035_phy_fixup()
  ARM i.MX6q: remove clk-out fixup for the Atheros AR8031 and AR8035
    PHYs
  ARM i.MX6q: remove Atheros AR8035 SmartEEE fixup
  ARM: imx6sx: remove Atheros AR8031 PHY fixup
  ARM: imx7d: remove Atheros AR8031 PHY fixup

 arch/arm/mach-imx/mach-imx6q.c  | 85 ---------------------------------
 arch/arm/mach-imx/mach-imx6sx.c | 26 ----------
 arch/arm/mach-imx/mach-imx7d.c  | 22 ---------
 3 files changed, 133 deletions(-)

-- 
2.29.2

[PATCH v3 1/7] ARM i.MX6q: remove PHY fixup for KSZ9031

[Oleksij Rempel]

Starting with:

    bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")

the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
At least with kernel v5.8 configuration provided by this fixup was
overwritten by the micrel driver.

This fixup was providing following configuration:

RX path: 2.58ns delay
    rx -0.42 (left shift) + rx_clk  +0.96ns (right shift) =
        1,38 + 1,2 internal RX delay = 2.58ns
TX path: 0.96ns delay
    tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns

This configuration is outside of the recommended RGMII clock skew delays
and about in the middle of: rgmii-idrx and rgmii-id

Since most embedded systems do not have enough place to introduce
significant clock skew, rgmii-id is the way to go.

In case this patch breaks network functionality on your system, build
kernel with enabled MICREL_PHY. If it is still not working then try
following device tree options:
1. Set (or change) phy-mode in DT to:
   phy-mode = "rgmii-id";
   This actives internal delay for both RX and TX.
1. Set (or change) phy-mode in DT to:
   phy-mode = "rgmii-idrx";
   This actives internal delay for RX only.
3. Use following DT properties:
   phy-mode = "rgmii";
   txen-skew-psec = <0>;
   rxdv-skew-psec = <0>;
   rxd0-skew-psec = <0>;
   rxd1-skew-psec = <0>;
   rxd2-skew-psec = <0>;
   rxd3-skew-psec = <0>;
   rxc-skew-psec = <1860>;
   txc-skew-psec = <1860>;
   This activates the internal delays for RX and TX, with the value as
   the fixup that is removed in this patch.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx6q.c | 23 -----------------------
 1 file changed, 23 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 703998ebb52e..78205f90da27 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -40,27 +40,6 @@ static int ksz9021rn_phy_fixup(struct phy_device *phydev)
 	return 0;
 }
 
-static void mmd_write_reg(struct phy_device *dev, int device, int reg, int val)
-{
-	phy_write(dev, 0x0d, device);
-	phy_write(dev, 0x0e, reg);
-	phy_write(dev, 0x0d, (1 << 14) | device);
-	phy_write(dev, 0x0e, val);
-}
-
-static int ksz9031rn_phy_fixup(struct phy_device *dev)
-{
-	/*
-	 * min rx data delay, max rx/tx clock delay,
-	 * min rx/tx control delay
-	 */
-	mmd_write_reg(dev, 2, 4, 0);
-	mmd_write_reg(dev, 2, 5, 0);
-	mmd_write_reg(dev, 2, 8, 0x003ff);
-
-	return 0;
-}
-
 /*
  * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
  * as they are used for slots1-7 PERST#
@@ -152,8 +131,6 @@ static void __init imx6q_enet_phy_init(void)
 	if (IS_BUILTIN(CONFIG_PHYLIB)) {
 		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 				ksz9021rn_phy_fixup);
-		phy_register_fixup_for_uid(PHY_ID_KSZ9031, MICREL_PHY_ID_MASK,
-				ksz9031rn_phy_fixup);
 		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef,
 				ar8031_phy_fixup);
 		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
-- 
2.29.2

[PATCH v3 2/7] ARM i.MX6q: remove part of ar8031_phy_fixup()

[Oleksij Rempel]

This part of this fixup is overwritten by at803x_config_init() in
drivers/net/phy/at803x.c. No additional devicetree fixes are needed.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx6q.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 78205f90da27..1abefe7e1c3a 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -82,12 +82,6 @@ static int ar8031_phy_fixup(struct phy_device *dev)
 	val |= 0x18;
 	phy_write(dev, 0xe, val);
 
-	/* introduce tx clock delay */
-	phy_write(dev, 0x1d, 0x5);
-	val = phy_read(dev, 0x1e);
-	val |= 0x0100;
-	phy_write(dev, 0x1e, val);
-
 	return 0;
 }
 
-- 
2.29.2

[PATCH v3 3/7] ARM i.MX6q: remove BMCR_PDOWN handler in ar8035_phy_fixup()

[Oleksij Rempel]

BMCR_PDOWN is removed by resume handler at803x_resume() in
drivers/net/phy/at803x.c

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx6q.c | 5 -----
 1 file changed, 5 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 1abefe7e1c3a..4c840e116003 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -110,11 +110,6 @@ static int ar8035_phy_fixup(struct phy_device *dev)
 	 */
 	ar8031_phy_fixup(dev);
 
-	/*check phy power*/
-	val = phy_read(dev, 0x0);
-	if (val & BMCR_PDOWN)
-		phy_write(dev, 0x0, val & ~BMCR_PDOWN);
-
 	return 0;
 }
 
-- 
2.29.2

[PATCH v3 4/7] ARM i.MX6q: remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs

[Oleksij Rempel]

This configuration should be set over device tree.

If this patch breaks network functionality on your system, enable the
AT803X_PHY driver and set following device tree property in the PHY
node:

    qca,clk-out-frequency = <125000000>;

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx6q.c | 30 ------------------------------
 1 file changed, 30 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 4c840e116003..d12b571a61ac 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -68,25 +68,6 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
 
-static int ar8031_phy_fixup(struct phy_device *dev)
-{
-	u16 val;
-
-	/* To enable AR8031 output a 125MHz clk from CLK_25M */
-	phy_write(dev, 0xd, 0x7);
-	phy_write(dev, 0xe, 0x8016);
-	phy_write(dev, 0xd, 0x4007);
-
-	val = phy_read(dev, 0xe);
-	val &= 0xffe3;
-	val |= 0x18;
-	phy_write(dev, 0xe, val);
-
-	return 0;
-}
-
-#define PHY_ID_AR8031	0x004dd074
-
 static int ar8035_phy_fixup(struct phy_device *dev)
 {
 	u16 val;
@@ -101,15 +82,6 @@ static int ar8035_phy_fixup(struct phy_device *dev)
 	val = phy_read(dev, 0xe);
 	phy_write(dev, 0xe, val & ~(1 << 8));
 
-	/*
-	 * Enable 125MHz clock from CLK_25M on the AR8031.  This
-	 * is fed in to the IMX6 on the ENET_REF_CLK (V22) pad.
-	 * Also, introduce a tx clock delay.
-	 *
-	 * This is the same as is the AR8031 fixup.
-	 */
-	ar8031_phy_fixup(dev);
-
 	return 0;
 }
 
@@ -120,8 +92,6 @@ static void __init imx6q_enet_phy_init(void)
 	if (IS_BUILTIN(CONFIG_PHYLIB)) {
 		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 				ksz9021rn_phy_fixup);
-		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffef,
-				ar8031_phy_fixup);
 		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
 				ar8035_phy_fixup);
 	}
-- 
2.29.2

[PATCH v3 5/7] ARM i.MX6q: remove Atheros AR8035 SmartEEE fixup

[Oleksij Rempel]

This fixup removes the Lpi_en bit.

If this patch breaks functionality of your board, use following device
tree properties: qca,smarteee-tw-us-1g and qca,smarteee-tw-us-100m.

For example:

	ethernet-phy@X {
		reg = <0xX>;
		qca,smarteee-tw-us-1g = <24>;
		....
	};

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx6q.c | 21 ---------------------
 1 file changed, 21 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index d12b571a61ac..c9d7c29d95e1 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -68,32 +68,11 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, ventana_pciesw_early_fixup);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, ventana_pciesw_early_fixup);
 DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, ventana_pciesw_early_fixup);
 
-static int ar8035_phy_fixup(struct phy_device *dev)
-{
-	u16 val;
-
-	/* Ar803x phy SmartEEE feature cause link status generates glitch,
-	 * which cause ethernet link down/up issue, so disable SmartEEE
-	 */
-	phy_write(dev, 0xd, 0x3);
-	phy_write(dev, 0xe, 0x805d);
-	phy_write(dev, 0xd, 0x4003);
-
-	val = phy_read(dev, 0xe);
-	phy_write(dev, 0xe, val & ~(1 << 8));
-
-	return 0;
-}
-
-#define PHY_ID_AR8035 0x004dd072
-
 static void __init imx6q_enet_phy_init(void)
 {
 	if (IS_BUILTIN(CONFIG_PHYLIB)) {
 		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
 				ksz9021rn_phy_fixup);
-		phy_register_fixup_for_uid(PHY_ID_AR8035, 0xffffffef,
-				ar8035_phy_fixup);
 	}
 }
 
-- 
2.29.2

[PATCH v3 6/7] ARM: imx6sx: remove Atheros AR8031 PHY fixup

[Oleksij Rempel]

If this patch breaks your system, enable AT803X_PHY driver and add a PHY
node to the board device tree:

	phy-connection-type = "rgmii-txid"; (or rgmii-id)
	ethernet-phy@X {
		reg = <0xX>;

		qca,clk-out-frequency = <125000000>;

		vddio-supply = <&vddh>;

		vddio: vddio-regulator {
			regulator-name = "VDDIO";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};

		vddh: vddh-regulator {
			regulator-name = "VDDH";
		};
	};

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx6sx.c | 26 --------------------------
 1 file changed, 26 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c
index 781e2a94fdd7..e65ed5218f53 100644
--- a/arch/arm/mach-imx/mach-imx6sx.c
+++ b/arch/arm/mach-imx/mach-imx6sx.c
@@ -15,31 +15,6 @@
 #include "common.h"
 #include "cpuidle.h"
 
-static int ar8031_phy_fixup(struct phy_device *dev)
-{
-	u16 val;
-
-	/* Set RGMII IO voltage to 1.8V */
-	phy_write(dev, 0x1d, 0x1f);
-	phy_write(dev, 0x1e, 0x8);
-
-	/* introduce tx clock delay */
-	phy_write(dev, 0x1d, 0x5);
-	val = phy_read(dev, 0x1e);
-	val |= 0x0100;
-	phy_write(dev, 0x1e, val);
-
-	return 0;
-}
-
-#define PHY_ID_AR8031   0x004dd074
-static void __init imx6sx_enet_phy_init(void)
-{
-	if (IS_BUILTIN(CONFIG_PHYLIB))
-		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
-					   ar8031_phy_fixup);
-}
-
 static void __init imx6sx_enet_clk_sel(void)
 {
 	struct regmap *gpr;
@@ -57,7 +32,6 @@ static void __init imx6sx_enet_clk_sel(void)
 
 static inline void imx6sx_enet_init(void)
 {
-	imx6sx_enet_phy_init();
 	imx6sx_enet_clk_sel();
 }
 
-- 
2.29.2

[PATCH v3 7/7] ARM: imx7d: remove Atheros AR8031 PHY fixup

[Oleksij Rempel]

This fixup configures the IO voltage and disables the SmartEEE
functionality.

If this patch breaks your system, enable AT803X_PHY driver and configure
the PHY by the device tree:

	phy-connection-type = "rgmii-id";
	ethernet-phy@X {
		reg = <0xX>;

		qca,smarteee-tw-us-1g = <24>;

		vddio-supply = <&vddh>;

		vddio: vddio-regulator {
			regulator-name = "VDDIO";
			regulator-min-microvolt = <1800000>;
			regulator-max-microvolt = <1800000>;
		};

		vddh: vddh-regulator {
			regulator-name = "VDDH";
		};
	};

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
---
 arch/arm/mach-imx/mach-imx7d.c | 22 ----------------------
 1 file changed, 22 deletions(-)

diff --git a/arch/arm/mach-imx/mach-imx7d.c b/arch/arm/mach-imx/mach-imx7d.c
index 879c35929a13..ccf64ddf8b7e 100644
--- a/arch/arm/mach-imx/mach-imx7d.c
+++ b/arch/arm/mach-imx/mach-imx7d.c
@@ -14,25 +14,6 @@
 
 #include "common.h"
 
-static int ar8031_phy_fixup(struct phy_device *dev)
-{
-	u16 val;
-
-	/* Set RGMII IO voltage to 1.8V */
-	phy_write(dev, 0x1d, 0x1f);
-	phy_write(dev, 0x1e, 0x8);
-
-	/* disable phy AR8031 SmartEEE function. */
-	phy_write(dev, 0xd, 0x3);
-	phy_write(dev, 0xe, 0x805d);
-	phy_write(dev, 0xd, 0x4003);
-	val = phy_read(dev, 0xe);
-	val &= ~(0x1 << 8);
-	phy_write(dev, 0xe, val);
-
-	return 0;
-}
-
 static int bcm54220_phy_fixup(struct phy_device *dev)
 {
 	/* enable RXC skew select RGMII copper mode */
@@ -44,14 +25,11 @@ static int bcm54220_phy_fixup(struct phy_device *dev)
 	return 0;
 }
 
-#define PHY_ID_AR8031	0x004dd074
 #define PHY_ID_BCM54220	0x600d8589
 
 static void __init imx7d_enet_phy_init(void)
 {
 	if (IS_BUILTIN(CONFIG_PHYLIB)) {
-		phy_register_fixup_for_uid(PHY_ID_AR8031, 0xffffffff,
-					   ar8031_phy_fixup);
 		phy_register_fixup_for_uid(PHY_ID_BCM54220, 0xffffffff,
 					   bcm54220_phy_fixup);
 	}
-- 
2.29.2

Re: [PATCH v3 1/7] ARM i.MX6q: remove PHY fixup for KSZ9031

[Andrew Lunn]

On Tue, May 11, 2021 at 06:37:29AM +0200, Oleksij Rempel wrote:
> Starting with:
> 
>     bcf3440c6dd7 ("net: phy: micrel: add phy-mode support for the KSZ9031 PHY")
> 
> the micrel phy driver started respecting phy-mode for the KSZ9031 PHY.
> At least with kernel v5.8 configuration provided by this fixup was
> overwritten by the micrel driver.
> 
> This fixup was providing following configuration:
> 
> RX path: 2.58ns delay
>     rx -0.42 (left shift) + rx_clk  +0.96ns (right shift) =
>         1,38 + 1,2 internal RX delay = 2.58ns
> TX path: 0.96ns delay
>     tx (no delay) + tx_clk 0.96ns (right shift) = 0.96ns
> 
> This configuration is outside of the recommended RGMII clock skew delays
> and about in the middle of: rgmii-idrx and rgmii-id
> 
> Since most embedded systems do not have enough place to introduce
> significant clock skew, rgmii-id is the way to go.
> 
> In case this patch breaks network functionality on your system, build
> kernel with enabled MICREL_PHY. If it is still not working then try
> following device tree options:
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-id";
>    This actives internal delay for both RX and TX.
> 1. Set (or change) phy-mode in DT to:
>    phy-mode = "rgmii-idrx";
>    This actives internal delay for RX only.
> 3. Use following DT properties:
>    phy-mode = "rgmii";
>    txen-skew-psec = <0>;
>    rxdv-skew-psec = <0>;
>    rxd0-skew-psec = <0>;
>    rxd1-skew-psec = <0>;
>    rxd2-skew-psec = <0>;
>    rxd3-skew-psec = <0>;
>    rxc-skew-psec = <1860>;
>    txc-skew-psec = <1860>;
>    This activates the internal delays for RX and TX, with the value as
>    the fixup that is removed in this patch.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v3 2/7] ARM i.MX6q: remove part of ar8031_phy_fixup()

[Andrew Lunn]

On Tue, May 11, 2021 at 06:37:30AM +0200, Oleksij Rempel wrote:
> This part of this fixup is overwritten by at803x_config_init() in
> drivers/net/phy/at803x.c. No additional devicetree fixes are needed.
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v3 3/7] ARM i.MX6q: remove BMCR_PDOWN handler in ar8035_phy_fixup()

[Andrew Lunn]

On Tue, May 11, 2021 at 06:37:31AM +0200, Oleksij Rempel wrote:
> BMCR_PDOWN is removed by resume handler at803x_resume() in
> drivers/net/phy/at803x.c
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v3 4/7] ARM i.MX6q: remove clk-out fixup for the Atheros AR8031 and AR8035 PHYs

[Andrew Lunn]

On Tue, May 11, 2021 at 06:37:32AM +0200, Oleksij Rempel wrote:
> This configuration should be set over device tree.
> 
> If this patch breaks network functionality on your system, enable the
> AT803X_PHY driver and set following device tree property in the PHY
> node:
> 
>     qca,clk-out-frequency = <125000000>;
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v3 5/7] ARM i.MX6q: remove Atheros AR8035 SmartEEE fixup

[Andrew Lunn]

On Tue, May 11, 2021 at 06:37:33AM +0200, Oleksij Rempel wrote:
> This fixup removes the Lpi_en bit.
> 
> If this patch breaks functionality of your board, use following device
> tree properties: qca,smarteee-tw-us-1g and qca,smarteee-tw-us-100m.
> 
> For example:
> 
> 	ethernet-phy@X {
> 		reg = <0xX>;
> 		qca,smarteee-tw-us-1g = <24>;
> 		....
> 	};
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v3 6/7] ARM: imx6sx: remove Atheros AR8031 PHY fixup

[Andrew Lunn]

On Tue, May 11, 2021 at 06:37:34AM +0200, Oleksij Rempel wrote:
> If this patch breaks your system, enable AT803X_PHY driver and add a PHY
> node to the board device tree:
> 
> 	phy-connection-type = "rgmii-txid"; (or rgmii-id)
> 	ethernet-phy@X {
> 		reg = <0xX>;
> 
> 		qca,clk-out-frequency = <125000000>;
> 
> 		vddio-supply = <&vddh>;
> 
> 		vddio: vddio-regulator {
> 			regulator-name = "VDDIO";
> 			regulator-min-microvolt = <1800000>;
> 			regulator-max-microvolt = <1800000>;
> 		};
> 
> 		vddh: vddh-regulator {
> 			regulator-name = "VDDH";
> 		};
> 	};
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v3 7/7] ARM: imx7d: remove Atheros AR8031 PHY fixup

[Andrew Lunn]

On Tue, May 11, 2021 at 06:37:35AM +0200, Oleksij Rempel wrote:
> This fixup configures the IO voltage and disables the SmartEEE
> functionality.
> 
> If this patch breaks your system, enable AT803X_PHY driver and configure
> the PHY by the device tree:
> 
> 	phy-connection-type = "rgmii-id";
> 	ethernet-phy@X {
> 		reg = <0xX>;
> 
> 		qca,smarteee-tw-us-1g = <24>;
> 
> 		vddio-supply = <&vddh>;
> 
> 		vddio: vddio-regulator {
> 			regulator-name = "VDDIO";
> 			regulator-min-microvolt = <1800000>;
> 			regulator-max-microvolt = <1800000>;
> 		};
> 
> 		vddh: vddh-regulator {
> 			regulator-name = "VDDH";
> 		};
> 	};
> 
> Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v3 0/7] remove different PHY fixups

[Shawn Guo]

On Tue, May 11, 2021 at 06:37:28AM +0200, Oleksij Rempel wrote:
> changes v3:
> - split arch and dts changes
> 
> changes v2:
> - rebase against latest kernel
> - fix networking on RIoTBoard
> 
> This patch series tries to remove most of the imx6 and imx7 board
> specific PHY configuration via fixup, as this breaks the PHYs when
> connected to switch chips or USB Ethernet MACs.
> 
> Each patch has the possibility to break boards, but contains a
> recommendation to fix the problem in a more portable and future-proof
> way.
> 
> Oleksij Rempel (7):
>   ARM i.MX6q: remove PHY fixup for KSZ9031
>   ARM i.MX6q: remove part of ar8031_phy_fixup()
>   ARM i.MX6q: remove BMCR_PDOWN handler in ar8035_phy_fixup()
>   ARM i.MX6q: remove clk-out fixup for the Atheros AR8031 and AR8035
>     PHYs
>   ARM i.MX6q: remove Atheros AR8035 SmartEEE fixup

Changed the subject prefix to 'ARM: imx6q: ...', and applied the series.

Shawn

>   ARM: imx6sx: remove Atheros AR8031 PHY fixup
>   ARM: imx7d: remove Atheros AR8031 PHY fixup
> 
>  arch/arm/mach-imx/mach-imx6q.c  | 85 ---------------------------------
>  arch/arm/mach-imx/mach-imx6sx.c | 26 ----------
>  arch/arm/mach-imx/mach-imx7d.c  | 22 ---------
>  3 files changed, 133 deletions(-)
> 
> -- 
> 2.29.2
>