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From: Ben Hutchings <>
Cc: Grygorii Strashko <>,, Andrew Lunn <>,
	Vivien Didelot <>,
	Florian Fainelli <>,
	Vladimir Oltean <>
Subject: Ethernet padding - ti_cpsw vs DSA tail tag
Date: Mon, 31 May 2021 14:40:52 +0200	[thread overview]
Message-ID: <20210531124051.GA15218@cephalopod> (raw)

I'm working on a system that uses a TI Sitara SoC with one of its
Ethernet ports connected to the host port of a Microchip KSZ8795
switch.  I'm updating the kernel from 4.14.y to 5.10.y.  Currently I
am using the ti_cpsw driver, but it looks like the ti_cpsw_new driver
has the same issue.

The Microchip switch expects a tail tag on ingress from the host port
to control which external port(s) to forward to.  This must appear
immediately before the frame checksum.  The DSA core correctly pads
outgoing skbs to at least 60 bytes before tag_ksz appends the tag.

However, since commit 9421c9015047 ("net: ethernet: ti: cpsw: fix min
eth packet size"), the cpsw driver pads outgoing skbs to at least 64
bytes.  This means that in smaller packets the tag byte is no longer
at the tail.

It's not obvious to me where this should be fixed.  Should drivers
that pad in ndo_start_xmit be aware of any tail tag that needs to be
moved?  Should DSA be aware that a lower driver has a minimum size >
60 bytes?


             reply	other threads:[~2021-05-31 12:40 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-31 12:40 Ben Hutchings [this message]
2021-05-31 14:29 ` Vladimir Oltean
2021-05-31 15:22   ` Florian Fainelli
2021-06-11 14:12   ` Grygorii Strashko

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