From: Sean Anderson <sean.anderson@seco.com>
To: netdev@vger.kernel.org, "David S . Miller" <davem@davemloft.net>,
Jakub Kicinski <kuba@kernel.org>,
linux-kernel@vger.kernel.org
Cc: Andrew Lunn <andrew@lunn.ch>,
Heiner Kallweit <hkallweit1@gmail.com>,
Russell King <linux@armlinux.org.uk>,
Sean Anderson <sean.anderson@seco.com>,
Claudiu Beznea <claudiu.beznea@microchip.com>,
Nicolas Ferre <nicolas.ferre@microchip.com>
Subject: [RFC net-next PATCH 08/16] net: macb: Clean up macb_validate
Date: Mon, 4 Oct 2021 15:15:19 -0400 [thread overview]
Message-ID: <20211004191527.1610759-9-sean.anderson@seco.com> (raw)
In-Reply-To: <20211004191527.1610759-1-sean.anderson@seco.com>
As the number of interfaces grows, the number of if statements grows
ever more unweildy. Clean everything up a bit by using a switch
statement. No functional change intended.
While we're on the subject, could someone clarify the relationship
between the various speed capabilities? What's the difference between
MACB_CAPS_GIGABIT_MODE_AVAILABLE, MACB_CAPS_HIGH_SPEED, MACB_CAPS_PCS,
and macb_is_gem()? Would there ever be a GEM without GIGABIT_MODE?
HIGH_SPEED without PCS? Why doesn't SGMII care if we're a gem (I think
this one is a bug, because it cares later on)?
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
---
drivers/net/ethernet/cadence/macb_main.c | 99 +++++++++++-------------
1 file changed, 45 insertions(+), 54 deletions(-)
diff --git a/drivers/net/ethernet/cadence/macb_main.c b/drivers/net/ethernet/cadence/macb_main.c
index e2730b3e1a57..18afa544b623 100644
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -510,32 +510,55 @@ static void macb_validate(struct phylink_config *config,
unsigned long *supported,
struct phylink_link_state *state)
{
+ bool one = state->interface == PHY_INTERFACE_MODE_NA;
struct net_device *ndev = to_net_dev(config->dev);
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
struct macb *bp = netdev_priv(ndev);
- /* We only support MII, RMII, GMII, RGMII & SGMII. */
- if (state->interface != PHY_INTERFACE_MODE_NA &&
- state->interface != PHY_INTERFACE_MODE_MII &&
- state->interface != PHY_INTERFACE_MODE_RMII &&
- state->interface != PHY_INTERFACE_MODE_GMII &&
- state->interface != PHY_INTERFACE_MODE_SGMII &&
- state->interface != PHY_INTERFACE_MODE_10GBASER &&
- !phy_interface_mode_is_rgmii(state->interface)) {
- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
- return;
- }
-
- if (!macb_is_gem(bp) &&
- (state->interface == PHY_INTERFACE_MODE_GMII ||
- phy_interface_mode_is_rgmii(state->interface))) {
- bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
- return;
- }
-
- if (state->interface == PHY_INTERFACE_MODE_10GBASER &&
- !(bp->caps & MACB_CAPS_HIGH_SPEED &&
- bp->caps & MACB_CAPS_PCS)) {
+ switch (state->interface) {
+ case PHY_INTERFACE_MODE_NA:
+ case PHY_INTERFACE_MODE_10GBASER:
+ if (bp->caps & MACB_CAPS_HIGH_SPEED &&
+ bp->caps & MACB_CAPS_PCS &&
+ bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) {
+ phylink_set(mask, 10000baseCR_Full);
+ phylink_set(mask, 10000baseER_Full);
+ phylink_set(mask, 10000baseKR_Full);
+ phylink_set(mask, 10000baseLR_Full);
+ phylink_set(mask, 10000baseLRM_Full);
+ phylink_set(mask, 10000baseSR_Full);
+ phylink_set(mask, 10000baseT_Full);
+ } else if (one) {
+ goto none;
+ }
+ if (one)
+ break;
+ fallthrough;
+ case PHY_INTERFACE_MODE_GMII:
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ if (!macb_is_gem(bp) && one)
+ goto none;
+ fallthrough;
+ case PHY_INTERFACE_MODE_SGMII:
+ if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) {
+ phylink_set(mask, 1000baseT_Full);
+ phylink_set(mask, 1000baseX_Full);
+ if (!(bp->caps & MACB_CAPS_NO_GIGABIT_HALF))
+ phylink_set(mask, 1000baseT_Half);
+ }
+ fallthrough;
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_RMII:
+ phylink_set(mask, 10baseT_Half);
+ phylink_set(mask, 10baseT_Full);
+ phylink_set(mask, 100baseT_Half);
+ phylink_set(mask, 100baseT_Full);
+ break;
+ none:
+ default:
bitmap_zero(supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
return;
}
@@ -543,38 +566,6 @@ static void macb_validate(struct phylink_config *config,
phylink_set_port_modes(mask);
phylink_set(mask, Autoneg);
phylink_set(mask, Asym_Pause);
-
- if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE &&
- (state->interface == PHY_INTERFACE_MODE_NA ||
- state->interface == PHY_INTERFACE_MODE_10GBASER)) {
- phylink_set(mask, 10000baseCR_Full);
- phylink_set(mask, 10000baseER_Full);
- phylink_set(mask, 10000baseKR_Full);
- phylink_set(mask, 10000baseLR_Full);
- phylink_set(mask, 10000baseLRM_Full);
- phylink_set(mask, 10000baseSR_Full);
- phylink_set(mask, 10000baseT_Full);
- if (state->interface != PHY_INTERFACE_MODE_NA)
- goto out;
- }
-
- phylink_set(mask, 10baseT_Half);
- phylink_set(mask, 10baseT_Full);
- phylink_set(mask, 100baseT_Half);
- phylink_set(mask, 100baseT_Full);
-
- if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE &&
- (state->interface == PHY_INTERFACE_MODE_NA ||
- state->interface == PHY_INTERFACE_MODE_GMII ||
- state->interface == PHY_INTERFACE_MODE_SGMII ||
- phy_interface_mode_is_rgmii(state->interface))) {
- phylink_set(mask, 1000baseT_Full);
- phylink_set(mask, 1000baseX_Full);
-
- if (!(bp->caps & MACB_CAPS_NO_GIGABIT_HALF))
- phylink_set(mask, 1000baseT_Half);
- }
-out:
bitmap_and(supported, supported, mask, __ETHTOOL_LINK_MODE_MASK_NBITS);
bitmap_and(state->advertising, state->advertising, mask,
__ETHTOOL_LINK_MODE_MASK_NBITS);
--
2.25.1
next prev parent reply other threads:[~2021-10-04 19:16 UTC|newest]
Thread overview: 59+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-04 19:15 [RFC net-next PATCH 00/16] Add support for Xilinx PCS Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 01/16] dt-bindings: net: Add pcs property Sean Anderson
2021-10-05 9:39 ` Russell King (Oracle)
2021-10-05 16:18 ` Sean Anderson
2021-10-12 13:16 ` Rob Herring
2021-10-12 16:18 ` Sean Anderson
2021-10-12 16:44 ` Rob Herring
2021-10-12 17:01 ` Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 02/16] dt-bindings: net: Add binding for Xilinx PCS Sean Anderson
2021-10-05 12:26 ` Rob Herring
2021-10-04 19:15 ` [RFC net-next PATCH 03/16] net: sfp: Fix typo in state machine debug string Sean Anderson
2021-10-04 21:31 ` Andrew Lunn
2021-10-04 19:15 ` [RFC net-next PATCH 04/16] net: phylink: Move phylink_set_pcs before phylink_create Sean Anderson
2021-10-05 9:43 ` Russell King (Oracle)
2021-10-04 19:15 ` [RFC net-next PATCH 05/16] net: phylink: Automatically attach PCS devices Sean Anderson
2021-10-05 9:48 ` Russell King (Oracle)
2021-10-05 16:42 ` Sean Anderson
2021-10-07 10:23 ` Russell King (Oracle)
2021-10-08 0:14 ` Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 06/16] net: phylink: Add function for optionally adding a PCS Sean Anderson
2021-10-05 9:51 ` Russell King (Oracle)
2021-10-05 13:43 ` Andrew Lunn
2021-10-05 16:17 ` Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 07/16] net: phylink: Add helpers for c22 registers without MDIO Sean Anderson
2021-10-22 12:33 ` Russell King (Oracle)
2021-10-04 19:15 ` Sean Anderson [this message]
2021-10-04 23:04 ` [RFC net-next PATCH 08/16] net: macb: Clean up macb_validate Russell King (Oracle)
2021-10-04 23:09 ` Sean Anderson
2021-10-07 13:22 ` Nicolas Ferre
2021-10-08 0:20 ` Sean Anderson
2021-10-08 8:12 ` Nicolas Ferre
2021-10-04 19:15 ` [RFC net-next PATCH 09/16] net: macb: Move most of mac_prepare to mac_config Sean Anderson
2021-10-04 23:05 ` Russell King (Oracle)
2021-10-04 23:09 ` Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 10/16] net: macb: Move PCS settings to PCS callbacks Sean Anderson
2021-10-05 10:06 ` Russell King (Oracle)
2021-10-05 16:03 ` Sean Anderson
2021-10-05 18:53 ` Russell King (Oracle)
2021-10-05 21:44 ` Sean Anderson
2021-10-05 22:19 ` Russell King (Oracle)
2021-10-07 10:34 ` Russell King (Oracle)
2021-10-07 11:29 ` Russell King (Oracle)
2021-10-07 16:23 ` Russell King (Oracle)
2021-10-07 17:04 ` Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 11/16] net: macb: Support restarting PCS autonegotiation Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 12/16] net: macb: Support external PCSs Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 13/16] net: phy: Export get_phy_c22_id Sean Anderson
2021-10-05 10:12 ` Russell King (Oracle)
2021-10-04 19:15 ` [RFC net-next PATCH 14/16] net: mdio: Add helper functions for accessing MDIO devices Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 15/16] net: pcs: Add Xilinx PCS driver Sean Anderson
2021-10-04 19:15 ` [RFC net-next PATCH 16/16] net: sfp: Add quirk to ignore PHYs Sean Anderson
2021-10-04 22:01 ` Andrew Lunn
2021-10-05 10:33 ` Russell King (Oracle)
2021-10-05 16:45 ` Sean Anderson
2021-10-05 18:10 ` Sean Anderson
2021-10-05 19:12 ` Russell King (Oracle)
2021-10-05 20:38 ` Sean Anderson
2021-10-05 22:17 ` Russell King (Oracle)
2021-10-05 23:16 ` Sean Anderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20211004191527.1610759-9-sean.anderson@seco.com \
--to=sean.anderson@seco.com \
--cc=andrew@lunn.ch \
--cc=claudiu.beznea@microchip.com \
--cc=davem@davemloft.net \
--cc=hkallweit1@gmail.com \
--cc=kuba@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=netdev@vger.kernel.org \
--cc=nicolas.ferre@microchip.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).