From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4224FC43219 for ; Mon, 14 Mar 2022 08:00:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235039AbiCNIB4 (ORCPT ); Mon, 14 Mar 2022 04:01:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45380 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237424AbiCNIBE (ORCPT ); Mon, 14 Mar 2022 04:01:04 -0400 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9931B2A24A; Mon, 14 Mar 2022 00:58:09 -0700 (PDT) X-UUID: 87696065089142a08d64aced8fec0026-20220314 X-UUID: 87696065089142a08d64aced8fec0026-20220314 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 563562564; Mon, 14 Mar 2022 15:57:20 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Mon, 14 Mar 2022 15:57:19 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Mar 2022 15:57:18 +0800 From: Biao Huang To: , Jakub Kicinski , Rob Herring , CC: Matthias Brugger , Giuseppe Cavallaro , Alexandre Torgue , Jose Abreu , Maxime Coquelin , Biao Huang , , , , , , , , , Subject: [PATCH net-next v13 2/7] stmmac: dwmac-mediatek: Reuse more common features Date: Mon, 14 Mar 2022 15:57:08 +0800 Message-ID: <20220314075713.29140-3-biao.huang@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220314075713.29140-1-biao.huang@mediatek.com> References: <20220314075713.29140-1-biao.huang@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-MTK: N Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch makes dwmac-mediatek reuse more features supported by stmmac_platform.c. Signed-off-by: Biao Huang Acked-by: AngeloGioacchino Del Regno --- .../ethernet/stmicro/stmmac/dwmac-mediatek.c | 32 +++++++++---------- 1 file changed, 15 insertions(+), 17 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c index 0ff57c268dca..8747aa4403e8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c @@ -334,22 +334,20 @@ static int mediatek_dwmac_init(struct platform_device *pdev, void *priv) const struct mediatek_dwmac_variant *variant = plat->variant; int ret; - ret = dma_set_mask_and_coherent(plat->dev, DMA_BIT_MASK(variant->dma_bit_mask)); - if (ret) { - dev_err(plat->dev, "No suitable DMA available, err = %d\n", ret); - return ret; - } - - ret = variant->dwmac_set_phy_interface(plat); - if (ret) { - dev_err(plat->dev, "failed to set phy interface, err = %d\n", ret); - return ret; + if (variant->dwmac_set_phy_interface) { + ret = variant->dwmac_set_phy_interface(plat); + if (ret) { + dev_err(plat->dev, "failed to set phy interface, err = %d\n", ret); + return ret; + } } - ret = variant->dwmac_set_delay(plat); - if (ret) { - dev_err(plat->dev, "failed to set delay value, err = %d\n", ret); - return ret; + if (variant->dwmac_set_delay) { + ret = variant->dwmac_set_delay(plat); + if (ret) { + dev_err(plat->dev, "failed to set delay value, err = %d\n", ret); + return ret; + } } ret = clk_bulk_prepare_enable(plat->num_clks_to_config, plat->clks); @@ -422,15 +420,15 @@ static int mediatek_dwmac_probe(struct platform_device *pdev) return PTR_ERR(plat_dat); plat_dat->interface = priv_plat->phy_mode; - plat_dat->has_gmac4 = 1; - plat_dat->has_gmac = 0; - plat_dat->pmt = 0; + plat_dat->use_phy_wol = 1; plat_dat->riwt_off = 1; plat_dat->maxmtu = ETH_DATA_LEN; + plat_dat->addr64 = priv_plat->variant->dma_bit_mask; plat_dat->bsp_priv = priv_plat; plat_dat->init = mediatek_dwmac_init; plat_dat->exit = mediatek_dwmac_exit; plat_dat->clks_config = mediatek_dwmac_clks_config; + mediatek_dwmac_init(pdev, priv_plat); ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res); -- 2.25.1