* [PATCH v5 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode
@ 2022-03-23 18:00 Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Andy Chiu @ 2022-03-23 18:00 UTC (permalink / raw)
To: radhey.shyam.pandey, robert.hancock, michal.simek
Cc: davem, kuba, pabeni, robh+dt, linux, andrew, netdev, devicetree,
robh, Andy Chiu
The Ethernet driver use phy-handle to reference the PCS/PMA PHY. This
could be a problem if one wants to configure an external PHY via phylink,
since it use the same phandle to get the PHY. To fix this, introduce a
dedicated pcs-handle to point to the PCS/PMA PHY and deprecate the use
of pointing it with phy-handle. A similar use case of pcs-handle can be
seen on dpaa2 as well.
The v4 patch was wrongly based on net-next tree. 1,2,4 parts of v5 patch
was generated after re-applying the v4 patch then resolving conflicts on
the net tree. 3/5 also describes the pcs-handle more globally at the
ethernet-controller device tree binding document.
Andy Chiu (4):
net: axienet: setup mdio unconditionally
net: axienet: factor out phy_node in struct axienet_local
dt-bindings: net: add pcs-handle attribute
net: axiemac: use a phandle to reference pcs_phy
.../bindings/net/ethernet-controller.yaml | 6 ++++
.../bindings/net/xilinx_axienet.txt | 8 ++++-
drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 --
.../net/ethernet/xilinx/xilinx_axienet_main.c | 33 ++++++++++---------
4 files changed, 31 insertions(+), 18 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 7+ messages in thread
* [PATCH v5 net 1/4] net: axienet: setup mdio unconditionally
2022-03-23 18:00 [PATCH v5 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
@ 2022-03-23 18:00 ` Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Andy Chiu @ 2022-03-23 18:00 UTC (permalink / raw)
To: radhey.shyam.pandey, robert.hancock, michal.simek
Cc: davem, kuba, pabeni, robh+dt, linux, andrew, netdev, devicetree,
robh, Andy Chiu, Greentime Hu
The call to axienet_mdio_setup should not depend on whether "phy-node"
pressents on the DT. Besides, since `lp->phy_node` is used if PHY is in
SGMII or 100Base-X modes, move it into the if statement. And the next patch
will remove `lp->phy_node` from driver's private structure and do an
of_node_put on it right away after use since it is not used elsewhere.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 377c94ec2486..93be1adc303f 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2060,15 +2060,14 @@ static int axienet_probe(struct platform_device *pdev)
if (ret)
goto cleanup_clk;
- lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
- if (lp->phy_node) {
- ret = axienet_mdio_setup(lp);
- if (ret)
- dev_warn(&pdev->dev,
- "error registering MDIO bus: %d\n", ret);
- }
+ ret = axienet_mdio_setup(lp);
+ if (ret)
+ dev_warn(&pdev->dev,
+ "error registering MDIO bus: %d\n", ret);
+
if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
+ lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
if (!lp->phy_node) {
dev_err(&pdev->dev, "phy-handle required for 1000BaseX/SGMII\n");
ret = -EINVAL;
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v5 net 2/4] net: axienet: factor out phy_node in struct axienet_local
2022-03-23 18:00 [PATCH v5 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
@ 2022-03-23 18:00 ` Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
3 siblings, 0 replies; 7+ messages in thread
From: Andy Chiu @ 2022-03-23 18:00 UTC (permalink / raw)
To: radhey.shyam.pandey, robert.hancock, michal.simek
Cc: davem, kuba, pabeni, robh+dt, linux, andrew, netdev, devicetree,
robh, Andy Chiu, Greentime Hu
the struct member `phy_node` of struct axienet_local is not used by the
driver anymore after initialization. It might be a remnent of old code
and could be removed.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet.h | 2 --
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 13 +++++--------
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet.h b/drivers/net/ethernet/xilinx/xilinx_axienet.h
index 5b4d153b1492..6a0b7ad958cd 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet.h
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet.h
@@ -428,8 +428,6 @@ struct axienet_local {
struct net_device *ndev;
struct device *dev;
- struct device_node *phy_node;
-
struct phylink *phylink;
struct phylink_config phylink_config;
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index 93be1adc303f..a4783f95b979 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2067,18 +2067,20 @@ static int axienet_probe(struct platform_device *pdev)
if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
- lp->phy_node = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
- if (!lp->phy_node) {
+ np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
+ if (!np) {
dev_err(&pdev->dev, "phy-handle required for 1000BaseX/SGMII\n");
ret = -EINVAL;
goto cleanup_mdio;
}
- lp->pcs_phy = of_mdio_find_device(lp->phy_node);
+ lp->pcs_phy = of_mdio_find_device(np);
if (!lp->pcs_phy) {
ret = -EPROBE_DEFER;
+ of_node_put(np);
goto cleanup_mdio;
}
lp->phylink_config.pcs_poll = true;
+ of_node_put(np);
}
lp->phylink_config.dev = &ndev->dev;
@@ -2120,8 +2122,6 @@ static int axienet_probe(struct platform_device *pdev)
put_device(&lp->pcs_phy->dev);
if (lp->mii_bus)
axienet_mdio_teardown(lp);
- of_node_put(lp->phy_node);
-
cleanup_clk:
clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks);
clk_disable_unprepare(lp->axi_clk);
@@ -2150,9 +2150,6 @@ static int axienet_remove(struct platform_device *pdev)
clk_bulk_disable_unprepare(XAE_NUM_MISC_CLOCKS, lp->misc_clks);
clk_disable_unprepare(lp->axi_clk);
- of_node_put(lp->phy_node);
- lp->phy_node = NULL;
-
free_netdev(ndev);
return 0;
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v5 net 3/4] dt-bindings: net: add pcs-handle attribute
2022-03-23 18:00 [PATCH v5 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
@ 2022-03-23 18:00 ` Andy Chiu
2022-03-25 19:23 ` Andrew Lunn
2022-03-23 18:00 ` [PATCH v5 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
3 siblings, 1 reply; 7+ messages in thread
From: Andy Chiu @ 2022-03-23 18:00 UTC (permalink / raw)
To: radhey.shyam.pandey, robert.hancock, michal.simek
Cc: davem, kuba, pabeni, robh+dt, linux, andrew, netdev, devicetree,
robh, Andy Chiu, Greentime Hu
Document the new pcs-handle attribute to support connecting to an
external PHY. For Xilinx's AXI Ethernet, this is used when the core
operates in SGMII or 1000Base-X modes and links through the internal
PCS/PMA PHY.
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
---
.../devicetree/bindings/net/ethernet-controller.yaml | 6 ++++++
Documentation/devicetree/bindings/net/xilinx_axienet.txt | 8 +++++++-
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
index 34c5463abcec..978772c04e1c 100644
--- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml
+++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml
@@ -102,6 +102,12 @@ properties:
phy-mode:
$ref: "#/properties/phy-connection-type"
+ pcs-handle:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Specifies a reference to a node representing a PCS PHY device on a MDIO
+ bus to link with an external PHY (phy-handle) if exists.
+
phy-handle:
$ref: /schemas/types.yaml#/definitions/phandle
description:
diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
index b8e4894bc634..ba720a2ea5fc 100644
--- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt
+++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt
@@ -26,7 +26,8 @@ Required properties:
specified, the TX/RX DMA interrupts should be on that node
instead, and only the Ethernet core interrupt is optionally
specified here.
-- phy-handle : Should point to the external phy device.
+- phy-handle : Should point to the external phy device if exists. Pointing
+ this to the PCS/PMA PHY is deprecated and should be avoided.
See ethernet.txt file in the same directory.
- xlnx,rxmem : Set to allocated memory buffer for Rx/Tx in the hardware
@@ -68,6 +69,11 @@ Optional properties:
required through the core's MDIO interface (i.e. always,
unless the PHY is accessed through a different bus).
+ - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
+ modes, where "pcs-handle" should be preferably used to point
+ to the PCS/PMA PHY, and "phy-handle" should point to an
+ external PHY if exists.
+
Example:
axi_ethernet_eth: ethernet@40c00000 {
compatible = "xlnx,axi-ethernet-1.00.a";
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [PATCH v5 net 4/4] net: axiemac: use a phandle to reference pcs_phy
2022-03-23 18:00 [PATCH v5 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
` (2 preceding siblings ...)
2022-03-23 18:00 ` [PATCH v5 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
@ 2022-03-23 18:00 ` Andy Chiu
3 siblings, 0 replies; 7+ messages in thread
From: Andy Chiu @ 2022-03-23 18:00 UTC (permalink / raw)
To: radhey.shyam.pandey, robert.hancock, michal.simek
Cc: davem, kuba, pabeni, robh+dt, linux, andrew, netdev, devicetree,
robh, Andy Chiu, Greentime Hu
In some SGMII use cases where both a fixed link external PHY and the
internal PCS/PMA PHY need to be configured, we should explicitly use a
phandle "pcs-phy" to get the reference to the PCS/PMA PHY. Otherwise, the
driver would use "phy-handle" in the DT as the reference to both the
external and the internal PCS/PMA PHY.
In other cases where the core is connected to a SFP cage, we could still
point phy-handle to the intenal PCS/PMA PHY, and let the driver connect
to the SFP module, if exist, via phylink.
Fixes: 1a02556086fc (net: axienet: Properly handle PCS/PMA PHY for 1000BaseX mode)
Signed-off-by: Andy Chiu <andy.chiu@sifive.com>
Reviewed-by: Greentime Hu <greentime.hu@sifive.com>
Reviewed-by: Robert Hancock <robert.hancock@calian.com>
---
drivers/net/ethernet/xilinx/xilinx_axienet_main.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
index a4783f95b979..6749d0eebc13 100644
--- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
@@ -2067,9 +2067,16 @@ static int axienet_probe(struct platform_device *pdev)
if (lp->phy_mode == PHY_INTERFACE_MODE_SGMII ||
lp->phy_mode == PHY_INTERFACE_MODE_1000BASEX) {
- np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
+ np = of_parse_phandle(pdev->dev.of_node, "pcs-handle", 0);
if (!np) {
- dev_err(&pdev->dev, "phy-handle required for 1000BaseX/SGMII\n");
+ /* Deprecated: Always use "pcs-handle" for pcs_phy.
+ * Falling back to "phy-handle" here is only for
+ * backward compatibility with old device trees.
+ */
+ np = of_parse_phandle(pdev->dev.of_node, "phy-handle", 0);
+ }
+ if (!np) {
+ dev_err(&pdev->dev, "pcs-handle (preferred) or phy-handle required for 1000BaseX/SGMII\n");
ret = -EINVAL;
goto cleanup_mdio;
}
--
2.34.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* Re: [PATCH v5 net 3/4] dt-bindings: net: add pcs-handle attribute
2022-03-23 18:00 ` [PATCH v5 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
@ 2022-03-25 19:23 ` Andrew Lunn
2022-03-28 12:54 ` Andy Chiu
0 siblings, 1 reply; 7+ messages in thread
From: Andrew Lunn @ 2022-03-25 19:23 UTC (permalink / raw)
To: Andy Chiu
Cc: radhey.shyam.pandey, robert.hancock, michal.simek, davem, kuba,
pabeni, robh+dt, linux, netdev, devicetree, robh, Greentime Hu
> + - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
> + modes, where "pcs-handle" should be preferably used to point
> + to the PCS/PMA PHY, and "phy-handle" should point to an
> + external PHY if exists.
Since this is a new property, you don't have any backwards
compatibility to worry about, don't use 'preferably'. It should point
to the PCS/PCA PHY and anything else is wrong for this new property.
Andrew
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [PATCH v5 net 3/4] dt-bindings: net: add pcs-handle attribute
2022-03-25 19:23 ` Andrew Lunn
@ 2022-03-28 12:54 ` Andy Chiu
0 siblings, 0 replies; 7+ messages in thread
From: Andy Chiu @ 2022-03-28 12:54 UTC (permalink / raw)
To: Andrew Lunn
Cc: radhey.shyam.pandey, Robert Hancock, michal.simek, davem, kuba,
pabeni, robh+dt, linux, netdev, devicetree, robh, Greentime Hu
Thanks for the suggestion. I have included this in the v6 patch.
Andy
On Sat, Mar 26, 2022 at 3:23 AM Andrew Lunn <andrew@lunn.ch> wrote:
>
> > + - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X
> > + modes, where "pcs-handle" should be preferably used to point
> > + to the PCS/PMA PHY, and "phy-handle" should point to an
> > + external PHY if exists.
>
> Since this is a new property, you don't have any backwards
> compatibility to worry about, don't use 'preferably'. It should point
> to the PCS/PCA PHY and anything else is wrong for this new property.
>
> Andrew
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-03-28 12:56 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-23 18:00 [PATCH v5 net 0/4] Fix broken link on Xilinx's AXI Ethernet in SGMII mode Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 1/4] net: axienet: setup mdio unconditionally Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 2/4] net: axienet: factor out phy_node in struct axienet_local Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 3/4] dt-bindings: net: add pcs-handle attribute Andy Chiu
2022-03-25 19:23 ` Andrew Lunn
2022-03-28 12:54 ` Andy Chiu
2022-03-23 18:00 ` [PATCH v5 net 4/4] net: axiemac: use a phandle to reference pcs_phy Andy Chiu
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