From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 44D57C6FA86 for ; Thu, 15 Sep 2022 06:57:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229603AbiIOG5M (ORCPT ); Thu, 15 Sep 2022 02:57:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40462 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229820AbiIOG45 (ORCPT ); Thu, 15 Sep 2022 02:56:57 -0400 Received: from sender4-op-o14.zoho.com (sender4-op-o14.zoho.com [136.143.188.14]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65C3081B05; Wed, 14 Sep 2022 23:56:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1663224976; cv=none; d=zohomail.com; s=zohoarc; b=lmVH3MHzUFx3hmWfHOG3JTjPnXejGHWQzBS8HbgvFs6BB5iitXRgjjZpdkPP1Hj8m+E5wVIutC22QMvbXL1mvoxWhg1GAevnjYko5QKQc5IjC+VfFnAVvMchIugqPiDH+kAMfRl90fWq+AB0cDWpdPy+sHsz57lGifTNd8V2Aho= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1663224976; h=Content-Type:Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:To; bh=mv8wnCQI8K+FkvB2ZahCjYMMUvp+WpG/VEtG06Ocnio=; b=Dkoy5QQBL8mofBomNSpbWWan0i1Yb7iJfP7i6OCgTWj6Mxqiz+jWRaYFLIF+2K6+ED26NJnFxRQ1oj9oF19polLj4xz4yBOIXXgPQJ9JovDAsZopX150+htGeW9YBmdWcXu4IUsy17m0krEjKppeB3xXU31WJAwB8SE5OQKTdi4= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=arinc9.com; spf=pass smtp.mailfrom=arinc.unal@arinc9.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1663224976; s=zmail; d=arinc9.com; i=arinc.unal@arinc9.com; h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-Id:Message-Id:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Reply-To; bh=mv8wnCQI8K+FkvB2ZahCjYMMUvp+WpG/VEtG06Ocnio=; b=UHdQSE2yvWww0kqVUZt1ddrBkdtv5ahRT+DZNhqEmPfa7AnjE7cuS8qDRnv7DaTv e7rviHdl15eAJHm3lEm8eO46Evginm+B30ejwnUaxy3DW6qOMYzG3AAwCMB/bS+hHFC qiFVH5iYtuQCyzOw9ck9xcsP6NoJnTG+2oPrnvG8= Received: from arinc9-PC.lan (37.120.152.236 [37.120.152.236]) by mx.zohomail.com with SMTPS id 1663224973944582.5029729294455; Wed, 14 Sep 2022 23:56:13 -0700 (PDT) From: =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= To: Krzysztof Kozlowski , Rob Herring , Matthias Brugger , Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Thomas Bogendoerfer , Greg Kroah-Hartman , Sean Wang , Landen Chao , DENG Qingfang , Sergio Paracuellos , erkin.bozoglu@xeront.com Cc: netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, =?UTF-8?q?Ar=C4=B1n=C3=A7=20=C3=9CNAL?= , Sungbo Eo , Rob Herring Subject: [PATCH v2 net-next 02/10] dt-bindings: net: dsa: mediatek,mt7530: change mt7530 switch address Date: Thu, 15 Sep 2022 09:55:34 +0300 Message-Id: <20220915065542.13150-3-arinc.unal@arinc9.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220915065542.13150-1-arinc.unal@arinc9.com> References: <20220915065542.13150-1-arinc.unal@arinc9.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ZohoMailClient: External Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org In the case of muxing phy0 of the MT7530 switch, the switch and the phy will have the same address on the mdio bus, 0. This causes the ethernet driver to fail since devices on the mdio bus cannot share an address. Any address can be used for the switch, therefore, change the switch address to 0x1f. Suggested-by: Sungbo Eo Signed-off-by: Arınç ÜNAL Acked-by: Rob Herring --- .../bindings/net/dsa/mediatek,mt7530.yaml | 24 +++++++++---------- 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml index f9e7b6e20b35..2c73d13adf14 100644 --- a/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml +++ b/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml @@ -294,9 +294,9 @@ examples: #address-cells = <1>; #size-cells = <0>; - switch@0 { + switch@1f { compatible = "mediatek,mt7530"; - reg = <0>; + reg = <0x1f>; reset-gpios = <&pio 33 0>; @@ -356,9 +356,9 @@ examples: #address-cells = <1>; #size-cells = <0>; - switch@0 { + switch@1f { compatible = "mediatek,mt7530"; - reg = <0>; + reg = <0x1f>; mediatek,mcm; resets = <ðsys MT2701_ETHSYS_MCM_RST>; @@ -486,9 +486,9 @@ examples: #address-cells = <1>; #size-cells = <0>; - switch@0 { + switch@1f { compatible = "mediatek,mt7621"; - reg = <0>; + reg = <0x1f>; mediatek,mcm; resets = <&sysc MT7621_RST_MCM>; @@ -573,9 +573,9 @@ examples: reg = <4>; }; - switch@0 { + switch@1f { compatible = "mediatek,mt7621"; - reg = <0>; + reg = <0x1f>; mediatek,mcm; resets = <&sysc MT7621_RST_MCM>; @@ -664,9 +664,9 @@ examples: phy-mode = "rgmii"; }; - switch@0 { + switch@1f { compatible = "mediatek,mt7621"; - reg = <0>; + reg = <0x1f>; mediatek,mcm; resets = <&sysc MT7621_RST_MCM>; @@ -745,9 +745,9 @@ examples: phy-mode = "rgmii"; }; - switch@0 { + switch@1f { compatible = "mediatek,mt7621"; - reg = <0>; + reg = <0x1f>; mediatek,mcm; resets = <&sysc MT7621_RST_MCM>; -- 2.34.1