From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B593BC4167B for ; Fri, 9 Dec 2022 00:39:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229558AbiLIAjy (ORCPT ); Thu, 8 Dec 2022 19:39:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34922 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229462AbiLIAjw (ORCPT ); Thu, 8 Dec 2022 19:39:52 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 916191A38B; Thu, 8 Dec 2022 16:39:51 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id F143D620F5; Fri, 9 Dec 2022 00:39:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 170FEC433EF; Fri, 9 Dec 2022 00:39:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1670546390; bh=mu+QBJKsBbOEPe3vwUNFXgdSpmtahH0lZ/7jz8cGUtg=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=c+V1MIkJQ1+4wlqIwSgEgYrDMdSdTDElGCQrQSGaMfd8N1WrHjLLmyPXFFCf1qwSo xkHkbo6twikXnSyq9XeGiKD+hyrClpNIinTbcKvzhrNAewOA9WfIBGvoeZ4ySg/dyU aSMOQ8QcGb6d3cw74rZ3kM0NJca2rLD1Vvkx86vBO7o1JWzX0QTS0hBE1KvIkrEbc6 b6EtWISwZX8Vrymlkg1t+MVsZPzxRG6CVbYf9ef6YeTMUGbfLMpcG3YItGOUeAITcp cAt7c3LWhuUx2Y9svTaoNkYP+pjgjIVk478tH+DimuqEn0CS44iTgu2GZ2sRda19ge y6ZeR7cmNnifg== Date: Thu, 8 Dec 2022 16:39:49 -0800 From: Jakub Kicinski To: Jiri Pirko Cc: netdev.dump@gmail.com, "'Kubalewski, Arkadiusz'" , 'Vadim Fedorenko' , 'Jonathan Lemon' , 'Paolo Abeni' , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org Subject: Re: [RFC PATCH v4 0/4] Create common DPLL/clock configuration API Message-ID: <20221208163949.3833fe7b@kernel.org> In-Reply-To: References: <20221129213724.10119-1-vfedorenko@novek.ru> <20221206184740.28cb7627@kernel.org> <10bb01d90a45$77189060$6549b120$@gmail.com> <20221207152157.6185b52b@kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Thu, 8 Dec 2022 12:28:51 +0100 Jiri Pirko wrote: > >I think we discussed using serial numbers. > > Can you remind it? Do you mean serial number of pin? Serial number of the ASIC, board or device. Something will have a serno, append to that your pin id of choice - et voila! > >Are you saying within the driver it's somehow easier? The driver state > >is mostly per bus device, so I don't see how. > > You can have some shared data for multiple instances in the driver code, > why not? The question is whether it's easier. Easier to ensure quality of n implementations in random drivers. Or one implementation in the core, with a lot of clever people paying attention and reviewing the code. > >> There are many problems with that approach, and the submitted patch is not > >> explaining any of them. E.g. it contains the dpll_muxed_pin_register but no > >> free > >> counterpart + no flows. > > > >SMOC. > > Care to spell this out. I guess you didn't mean "South Middlesex > Opportunity Council" :D Simple matter of coding.