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From: Conor Dooley <conor@kernel.org>
To: Varshini Rajendran <varshini.rajendran@microchip.com>
Cc: tglx@linutronix.de, maz@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com,
	claudiu.beznea@microchip.com, davem@davemloft.net,
	edumazet@google.com, kuba@kernel.org, pabeni@redhat.com,
	gregkh@linuxfoundation.org, linux@armlinux.org.uk,
	mturquette@baylibre.com, sboyd@kernel.org, sre@kernel.org,
	broonie@kernel.org, arnd@arndb.de, gregory.clement@bootlin.com,
	sudeep.holla@arm.com, balamanikandan.gunasundar@microchip.com,
	mihai.sain@microchip.com, linux-kernel@vger.kernel.org,
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	Hari.PrasathGE@microchip.com, cristian.birsan@microchip.com,
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	dharma.b@microchip.com, nayabbasha.sayed@microchip.com,
	balakrishnan.s@microchip.com
Subject: Re: [PATCH 04/21] ARM: dts: at91: sam9x7: add device tree for soc
Date: Sat, 3 Jun 2023 22:35:59 +0100	[thread overview]
Message-ID: <20230603-resource-decode-47167e7e199a@spud> (raw)
In-Reply-To: <20230603200243.243878-5-varshini.rajendran@microchip.com>

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Hey Varshini,

On Sun, Jun 04, 2023 at 01:32:26AM +0530, Varshini Rajendran wrote:
> Add device tree file for SAM9X7 SoC family
> 
> Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
> [nicolas.ferre@microchip.com: add support for gmac to sam9x7]

Please just replace these [] things with a Co-developed-by.

> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
> [balamanikandan.gunasundar@microchip.com: Add device node csi2host and isc]
> Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
> ---
>  arch/arm/boot/dts/sam9x7.dtsi | 1333 +++++++++++++++++++++++++++++++++
>  1 file changed, 1333 insertions(+)
>  create mode 100644 arch/arm/boot/dts/sam9x7.dtsi
> 
> diff --git a/arch/arm/boot/dts/sam9x7.dtsi b/arch/arm/boot/dts/sam9x7.dtsi
> new file mode 100644
> index 000000000000..f98160182fe6
> --- /dev/null
> +++ b/arch/arm/boot/dts/sam9x7.dtsi
> @@ -0,0 +1,1333 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * sam9x7.dtsi - Device Tree Include file for Microchip SAM9X7 SoC family
> + *
> + * Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries
> + *
> + * Author: Varshini Rajendran <varshini.rajendran@microchip.com>
> + */
> +
> +#include <dt-bindings/clock/at91.h>
> +#include <dt-bindings/dma/at91.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/mfd/atmel-flexcom.h>
> +#include <dt-bindings/pinctrl/at91.h>
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +	model = "Microchip SAM9X7 SoC";
> +	compatible = "microchip,sam9x7";

Unless I am mistaken, sam9x7 is a family, not an soc. I'll have to
defer to Nicolas or someone that actually properly understands the
naming scheme here though! It's certainly odd to use sam9x7 here, when
the file is filled with references to sam9x60, which is a soc-specific
compatible.

Either way, the compatible is undocumented as far as I can tell and I
assume that this was not actually tested, since there doesn't appear
to be any dts including this file and therefore no way to build it?

> +	interrupt-parent = <&aic>;
> +
> +	aliases {
> +		serial0 = &dbgu;
> +		gpio0 = &pioA;
> +		gpio1 = &pioB;
> +		gpio2 = &pioC;
> +		gpio3 = &pioD;
> +	};
> +
> +	cpus {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		cpu@0 {
> +			compatible = "arm,arm926ej-s";
> +			device_type = "cpu";
> +			reg = <0>;
> +		};
> +	};
> +
> +	clocks {
> +		slow_xtal: slow_xtal {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +		};
> +
> +		main_xtal: main_xtal {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +		};
> +	};
> +
> +	sram: sram@300000 {
> +		compatible = "mmio-sram";
> +		reg = <0x300000 0x10000>;
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges = <0 0x300000 0x10000>;
> +	};
> +
> +	ahb {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		usb0: gadget@500000 {
> +			compatible = "microchip,sam9x60-udc";

This is not a sam9x60, so it should not only have that SoC's compatible
here. Ideally, "microchip,sam9x7{0,2,5}" with the sam9x60 one as a
fallback.

> +			reg = <0x500000 0x100000>,
> +			      <0xf803c000 0x400>;
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 23>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
> +			clock-names = "pclk", "hclk";
> +			assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
> +			assigned-clock-rates = <480000000>;
> +			status = "disabled";
> +		};
> +
> +		ohci0: usb@600000 {
> +			compatible = "atmel,at91rm9200-ohci", "usb-ohci";

Ditto here.

> +			reg = <0x600000 0x100000>;
> +			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_PERIPHERAL 22>, <&pmc PMC_TYPE_SYSTEM 6>;
> +			clock-names = "ohci_clk", "hclk", "uhpck";
> +			status = "disabled";
> +		};
> +
> +		ehci0: usb@700000 {
> +			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";

And here.

> +			reg = <0x700000 0x100000>;
> +			interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
> +			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 22>;
> +			clock-names = "usb_clk", "ehci_clk";
> +			assigned-clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>;
> +			assigned-clock-rates = <480000000>;
> +			status = "disabled";
> +		};
> +
> +		sdmmc0: sdio-host@80000000 {
> +			compatible = "microchip,sam9x60-sdhci";

And here.

> +			reg = <0x80000000 0x300>;
> +			interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
> +			clocks = <&pmc PMC_TYPE_PERIPHERAL 12>, <&pmc PMC_TYPE_GCK 12>;
> +			clock-names = "hclock", "multclk";
> +			assigned-clocks = <&pmc PMC_TYPE_GCK 12>;
> +			assigned-clock-rates = <100000000>;
> +			status = "disabled";
> +		};
> +
> +		sdmmc1: sdio-host@90000000 {
> +			compatible = "microchip,sam9x60-sdhci";

There's no point me typing it every time, but ditto the whole way
through this file ;)

Cheers,
Conor.

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  reply	other threads:[~2023-06-03 21:36 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-06-03 20:02 [PATCH 00/21] Add support for sam9x7 SoC family Varshini Rajendran
2023-06-03 20:02 ` [PATCH 01/21] dt-bindings: microchip: atmel,at91rm9200-tcb: add sam9x60 compatible Varshini Rajendran
2023-06-05  6:35   ` Krzysztof Kozlowski
2023-06-05  7:04     ` Arnd Bergmann
2023-06-05  7:34       ` Krzysztof Kozlowski
2023-06-05 12:03       ` Nicolas Ferre
2023-06-14 19:37   ` Rob Herring
2023-06-03 20:02 ` [PATCH 02/21] dt-bindings: usb: ehci: Add atmel at91sam9g45-ehci compatible Varshini Rajendran
2023-06-14 19:38   ` Rob Herring
2023-06-03 20:02 ` [PATCH 03/21] dt-bindings: usb: generic-ehci: Document clock-names property Varshini Rajendran
2023-06-03 21:15   ` Conor Dooley
2023-06-05 12:54     ` Nicolas Ferre
2023-06-05  6:36   ` Krzysztof Kozlowski
2023-06-03 20:02 ` [PATCH 04/21] ARM: dts: at91: sam9x7: add device tree for soc Varshini Rajendran
2023-06-03 21:35   ` Conor Dooley [this message]
2023-06-05  6:39   ` Krzysztof Kozlowski
2023-06-05  6:41   ` Krzysztof Kozlowski
2023-06-09  5:35   ` Dharma.B
2023-06-15  7:36   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 05/21] ARM: configs: at91: enable config flags for sam9x7 SoC Varshini Rajendran
2023-06-03 20:02 ` [PATCH 06/21] ARM: configs: at91: add mcan support Varshini Rajendran
2023-06-05  6:40   ` Krzysztof Kozlowski
2023-06-03 20:02 ` [PATCH 07/21] ARM: configs: at91: Enable csi and isc support Varshini Rajendran
2023-06-03 20:02 ` [PATCH 08/21] ARM: at91: pm: add support for sam9x7 soc family Varshini Rajendran
2023-06-15  7:42   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 09/21] ARM: at91: pm: add sam9x7 soc init config Varshini Rajendran
2023-06-15  7:43   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 10/21] ARM: at91: Kconfig: add config flag for SAM9X7 SoC Varshini Rajendran
2023-06-15  7:46   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 11/21] ARM: at91: add support in soc driver for new sam9x7 Varshini Rajendran
2023-06-15  7:48   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 12/21] clk: at91: clk-sam9x60-pll: re-factor to support individual core freq outputs Varshini Rajendran
2023-06-15  7:54   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 13/21] clk: at91: sam9x7: add support for HW PLL freq dividers Varshini Rajendran
2023-06-15  8:00   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 14/21] clk: at91: sam9x7: add sam9x7 pmc driver Varshini Rajendran
2023-06-04 18:00   ` Simon Horman
2023-06-15  8:39   ` Claudiu.Beznea
2023-06-03 20:02 ` [PATCH 15/21] dt-bindings: irqchip/atmel-aic5: Add support for sam9x7 aic Varshini Rajendran
2023-06-03 21:19   ` Conor Dooley
2023-06-03 21:23     ` Conor Dooley
2023-06-04  9:49       ` Arnd Bergmann
2023-06-04 21:08         ` Conor Dooley
2023-06-05 12:37           ` Nicolas Ferre
2023-06-14 19:41             ` Rob Herring
2023-06-03 20:02 ` [PATCH 16/21] " Varshini Rajendran
2023-06-03 20:02 ` [PATCH 17/21] power: reset: at91-poweroff: lookup for proper pmc dt node for sam9x7 Varshini Rajendran
2023-06-05  6:43   ` Krzysztof Kozlowski
2023-06-05 13:04     ` Nicolas Ferre
2023-06-05 13:26       ` Conor Dooley
2023-06-16 17:32         ` Varshini.Rajendran
2023-06-05 13:33       ` Krzysztof Kozlowski
2023-06-03 20:02 ` [PATCH 18/21] power: reset: at91-reset: add reset support for sam9x7 soc Varshini Rajendran
2023-06-03 20:02 ` [PATCH 19/21] power: reset: at91-reset: add sdhwc " Varshini Rajendran
2023-06-03 20:02 ` [PATCH 20/21] dt-bindings: net: cdns,macb: add documentation for sam9x7 ethernet interface Varshini Rajendran
2023-06-05  6:42   ` Krzysztof Kozlowski
2023-06-14 19:42   ` Rob Herring
2023-06-03 20:02 ` [PATCH 21/21] net: macb: add support for gmac to sam9x7 Varshini Rajendran
2023-06-05  6:42   ` Krzysztof Kozlowski
2023-06-05 12:07     ` Nicolas Ferre
2023-06-05 12:21       ` Arnd Bergmann
2023-06-05 13:34       ` Krzysztof Kozlowski

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