From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E7680C43381 for ; Fri, 15 Feb 2019 18:57:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id B81A3222D0 for ; Fri, 15 Feb 2019 18:57:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Vd6/X7/n" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2390767AbfBOS5x (ORCPT ); Fri, 15 Feb 2019 13:57:53 -0500 Received: from mail-wm1-f65.google.com ([209.85.128.65]:37715 "EHLO mail-wm1-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387768AbfBOS5x (ORCPT ); Fri, 15 Feb 2019 13:57:53 -0500 Received: by mail-wm1-f65.google.com with SMTP id x10so10505160wmg.2 for ; Fri, 15 Feb 2019 10:57:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=subject:to:cc:references:from:message-id:date:user-agent :mime-version:in-reply-to:content-language:content-transfer-encoding; bh=aPq6GG2AwDmUbg5WSTNzg5kCJorJ7nMZDHisyJ5xgeM=; b=Vd6/X7/nwyh7SBZi1vhQKGHkDVKSSnziDe8ypm1+UykF0l5n3Xp4GRO7uGAL71DAM8 Oqr34OfM4fWmQMwhV+o/DPS2kBcKS0gS/WA+vZIqbAOegZahD/r1Vgzn5dDwigeiDP71 JQmfPoArT+vLv8ukP8HdBa/V+b91wN/oKA+3qo+AT1T+cllDLRZzA7zzhfS9EOYyu00p uuEIcw0hlFh4FtU06taFTwQPpALJdWHHnrwKMndtjdh5ccPQBfRNhaUVvShYtN4u13jm NRGE00P0g3CsN73g5fkRqdG1FqgFW2R7T6Ji0BsmwvnN/L1Ffi+XBBumiYvvJQq75k3J NeJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:subject:to:cc:references:from:message-id:date :user-agent:mime-version:in-reply-to:content-language :content-transfer-encoding; bh=aPq6GG2AwDmUbg5WSTNzg5kCJorJ7nMZDHisyJ5xgeM=; b=MGjZuP+gL6vDdORFYw2VZS7ko6phO7+K2cCYaojzsS+vQnsGfgr0uuIRxDxfll4L7Z OyPCcpczvvmMU9nxuxfjL6qKiBVR6W5F4xXdy0xLEjhP53Es+7LBQ/NgfjhkKnAXsubE 7+s/F+4GYAfZL/GsOk4OjjdSX19bTfCFZYSFIiCdUFTFFfj541N7uzDju0NsgFkpb1eb jQ8PFiKcTEaMsyfIiK5A5HPduOOLY11V75E/UrPxNoOpL6rQbVfykqv9Zxc08LOaF3qZ LmE7WGnT6EzoArb7iU8F8Dp3DnGajtAmXQIsQPLAqWKBhKsY0s0FM5pDrsYecRP7YYKU DGAg== X-Gm-Message-State: AHQUAuac7L7yCLAvXs6mwz7i2agHuiH+ziHbKY2xqFR22hwH98isySS7 ktjy1hn6vxEujH8pTnJoWwx8pa75 X-Google-Smtp-Source: AHgI3IYxoZmRHLPLJ1RhGoVt99J6fk1D+2IViwR24FLoRrjW/4D0e++SOpbyPPKrR9gs4YJNT5Y8KA== X-Received: by 2002:a1c:a98b:: with SMTP id s133mr7215932wme.129.1550257071164; Fri, 15 Feb 2019 10:57:51 -0800 (PST) Received: from ?IPv6:2003:ea:8bf1:e200:9003:d3f4:b53e:b11? (p200300EA8BF1E2009003D3F4B53E0B11.dip0.t-ipconnect.de. [2003:ea:8bf1:e200:9003:d3f4:b53e:b11]) by smtp.googlemail.com with ESMTPSA id 2sm14268205wrg.89.2019.02.15.10.57.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 15 Feb 2019 10:57:50 -0800 (PST) Subject: Re: [PATCH net-next 1/2] net: phy: improve phy_resolve_aneg_linkmode To: Andrew Lunn Cc: Florian Fainelli , David Miller , "netdev@vger.kernel.org" References: <1571d9d1-b3ad-8c96-a476-4ae18d20abfe@gmail.com> <20190215135714.GI5699@lunn.ch> From: Heiner Kallweit Message-ID: <205137d8-00a7-e8d5-ba09-6a48f1f870fc@gmail.com> Date: Fri, 15 Feb 2019 19:57:45 +0100 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 MIME-Version: 1.0 In-Reply-To: <20190215135714.GI5699@lunn.ch> Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 7bit Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On 15.02.2019 14:57, Andrew Lunn wrote: > On Thu, Feb 14, 2019 at 10:15:31PM +0100, Heiner Kallweit wrote: >> We have the settings array of modes which is sorted based on aneg >> priority. Instead of checking each mode manually let's simply iterate >> over the sorted settings. >> >> Signed-off-by: Heiner Kallweit >> --- >> drivers/net/phy/phy-core.c | 43 +++++++------------------------------- >> 1 file changed, 7 insertions(+), 36 deletions(-) >> >> diff --git a/drivers/net/phy/phy-core.c b/drivers/net/phy/phy-core.c >> index cdea028d1..5d43106fe 100644 >> --- a/drivers/net/phy/phy-core.c >> +++ b/drivers/net/phy/phy-core.c >> @@ -349,45 +349,16 @@ size_t phy_speeds(unsigned int *speeds, size_t size, >> void phy_resolve_aneg_linkmode(struct phy_device *phydev) >> { >> __ETHTOOL_DECLARE_LINK_MODE_MASK(common); >> + int i; >> >> linkmode_and(common, phydev->lp_advertising, phydev->advertising); >> >> - if (linkmode_test_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, common)) { >> - phydev->speed = SPEED_10000; >> - phydev->duplex = DUPLEX_FULL; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, >> - common)) { >> - phydev->speed = SPEED_5000; >> - phydev->duplex = DUPLEX_FULL; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, >> - common)) { >> - phydev->speed = SPEED_2500; >> - phydev->duplex = DUPLEX_FULL; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, >> - common)) { >> - phydev->speed = SPEED_1000; >> - phydev->duplex = DUPLEX_FULL; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, >> - common)) { >> - phydev->speed = SPEED_1000; >> - phydev->duplex = DUPLEX_HALF; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, >> - common)) { >> - phydev->speed = SPEED_100; >> - phydev->duplex = DUPLEX_FULL; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, >> - common)) { >> - phydev->speed = SPEED_100; >> - phydev->duplex = DUPLEX_HALF; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, >> - common)) { >> - phydev->speed = SPEED_10; >> - phydev->duplex = DUPLEX_FULL; >> - } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, >> - common)) { >> - phydev->speed = SPEED_10; >> - phydev->duplex = DUPLEX_HALF; >> - } >> + for (i = 0; i < ARRAY_SIZE(settings); i++) >> + if (test_bit(settings[i].bit, common)) { >> + phydev->speed = settings[i].speed; >> + phydev->duplex = settings[i].duplex; >> + break; >> + } > > Hi Heiner > > Nice simplification. > > I just have one thought about this. The original code was limited to > baseT. The new code could in theory return a non BaseT speed. For that > to happen, it would require that phydev->lp_advertising and > phydev->advertising contain a non BaseT link mode? Is that possible? > I don't think it is. > Currently we set only BaseT modes because that's what the clause 45 standard registers offer. However drivers may come that use vendor registers for e.g. backplane auto-negotiation (IIRC clause 73). Now it's even better because this function shouldn't be (and doesn't have to be) limited to a specific physical link type. > Andrew > Heiner