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[2a01:c22:6f0c:8900:9422:b6d3:cb18:f1c6]) by smtp.googlemail.com with ESMTPSA id g6-20020a05600c4ec600b003b477532e66sm8087747wmq.2.2022.10.12.12.33.25 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 12 Oct 2022 12:33:25 -0700 (PDT) Message-ID: <3ffdaa0d-4a3d-dd2c-506c-d10b5297f430@gmail.com> Date: Wed, 12 Oct 2022 21:33:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (Windows NT 10.0; Win64; x64; rv:91.0) Gecko/20100101 Thunderbird/91.11.0 Subject: Re: [PATCH net] r8169: fix rtl8125b dmar pte write access not set error Content-Language: en-US To: Hau Cc: "netdev@vger.kernel.org" , nic_swsd , "kuba@kernel.org" , "grundler@chromium.org" References: <20221004081037.34064-1-hau@realtek.com> <6d607965-53ab-37c7-3920-ae2ad4be09e5@gmail.com> <6781f98dd232471791be8b0168f0153a@realtek.com> From: Heiner Kallweit In-Reply-To: <6781f98dd232471791be8b0168f0153a@realtek.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On 12.10.2022 09:59, Hau wrote: >> >> On 04.10.2022 10:10, Chunhao Lin wrote: >>> When close device, rx will be enabled if wol is enabeld. When open >>> device it will cause rx to dma to wrong address after pci_set_master(). >>> >>> In this patch, driver will disable tx/rx when close device. If wol is >>> eanbled only enable rx filter and disable rxdv_gate to let hardware >>> can receive packet to fifo but not to dma it. >>> >>> Fixes: 120068481405 ("r8169: fix failing WoL") >>> Signed-off-by: Chunhao Lin >>> --- >>> drivers/net/ethernet/realtek/r8169_main.c | 14 +++++++------- >>> 1 file changed, 7 insertions(+), 7 deletions(-) >>> >>> diff --git a/drivers/net/ethernet/realtek/r8169_main.c >>> b/drivers/net/ethernet/realtek/r8169_main.c >>> index 1b7fdb4f056b..c09cfbe1d3f0 100644 >>> --- a/drivers/net/ethernet/realtek/r8169_main.c >>> +++ b/drivers/net/ethernet/realtek/r8169_main.c >>> @@ -2239,6 +2239,9 @@ static void rtl_wol_enable_rx(struct >> rtl8169_private *tp) >>> if (tp->mac_version >= RTL_GIGA_MAC_VER_25) >>> RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | >>> AcceptBroadcast | AcceptMulticast | AcceptMyPhys); >>> + >>> + if (tp->mac_version >= RTL_GIGA_MAC_VER_40) >>> + RTL_W32(tp, MISC, RTL_R32(tp, MISC) & ~RXDV_GATED_EN); >> >> Is this correct anyway? Supposedly you want to set this bit to disable DMA. >> > If wol is enabled, driver need to disable hardware rxdv_gate for receiving packets. > OK, I see. But why disable it here? I see no scenario where rxdv_gate would be enabled when we get here.