From: Christophe ROULLIER <christophe.roullier@st.com>
To: Rob Herring <robh@kernel.org>
Cc: "davem@davemloft.net" <davem@davemloft.net>,
"joabreu@synopsys.com" <joabreu@synopsys.com>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"mcoquelin.stm32@gmail.com" <mcoquelin.stm32@gmail.com>,
Alexandre TORGUE <alexandre.torgue@st.com>,
Peppe CAVALLARO <peppe.cavallaro@st.com>,
"linux-stm32@st-md-mailman.stormreply.com"
<linux-stm32@st-md-mailman.stormreply.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
"andrew@lunn.ch" <andrew@lunn.ch>
Subject: Re: [PATCH V2 3/8] dt-bindings: net: stmmac: add phys config properties
Date: Tue, 26 Feb 2019 10:30:12 +0000 [thread overview]
Message-ID: <419f54c3-08a7-42be-4e1a-a7c0f61a4543@st.com> (raw)
In-Reply-To: <20190223001651.GA22381@bogus>
On 2/23/19 1:16 AM, Rob Herring wrote:
> On Fri, Feb 22, 2019 at 09:28:04AM +0100, Christophe Roullier wrote:
>> Add properties to support all Phy config
>> PHY_MODE (MII,GMII, RMII, RGMII) and in normal, PHY wo crystal (25Mhz),
>> PHY wo crystal (50Mhz), No 125Mhz from PHY config.
>>
>> Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
>> ---
>> Documentation/devicetree/bindings/net/stm32-dwmac.txt | 6 +++---
>> 1 file changed, 3 insertions(+), 3 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.txt b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
>> index 1341012..f42dc68 100644
>> --- a/Documentation/devicetree/bindings/net/stm32-dwmac.txt
>> +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.txt
>> @@ -24,9 +24,9 @@ Required properties:
>> encompases the glue register, and the offset of the control register.
>>
>> Optional properties:
>> -- clock-names: For MPU family "mac-clk-ck" for PHY without quartz
>> -- st,int-phyclk (boolean) : valid only where PHY do not have quartz and need to be clock
>> - by RCC
>
> You can't just remove properties.
There is no risk to remove/rename these 2 properties, because it is
specific board which is never deployed.
With new properties (renaming clock (eth-ck) + st,eth_clk_sel and
st,eth_ref_clk_sel, we are managed all kind of specific boards stm32mp1
So no risk of backward compatible.
>
>> +- clock-names: For MPU family "eth-ck" for PHY without quartz
>> +- st,eth_clk_sel (boolean) : set this property in RGMII PHY when you do not want use 125Mhz
>> +- st,eth_ref_clk_sel (boolean) : set this property in RMII mode when you have PHY without crystal 50MHz
>
> s/_/-/
>
> 'sel' I assume is short for select, but the naming here and description
> don't really tell me what I'm getting.
>
Ok, Rob, I will update with your recommendations
> Rob
>
next prev parent reply other threads:[~2019-02-26 10:30 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-22 8:28 [PATCH V2 0/8] stmmac: add some fixes for stm32 Christophe Roullier
2019-02-22 8:28 ` [PATCH V2 1/8] net: ethernet: stmmac: manage Ethernet WoL for stm32mp157c Christophe Roullier
2019-02-22 8:28 ` [PATCH V2 2/8] net: ethernet: stmmac: update to support all PHY config " Christophe Roullier
2019-02-22 8:28 ` [PATCH V2 3/8] dt-bindings: net: stmmac: add phys config properties Christophe Roullier
2019-02-23 0:16 ` Rob Herring
2019-02-26 10:30 ` Christophe ROULLIER [this message]
2019-02-22 8:28 ` [PATCH V2 4/8] net: ethernet: stmmac: add management of clk_csr property Christophe Roullier
2019-02-22 8:28 ` [PATCH V2 5/8] net: ethernet: stmmac: update to be compatible with MCU family (stm32f4, stm32h7) Christophe Roullier
2019-02-22 8:28 ` [PATCH V2 6/8] dt-bindings: net: stmmac: add syscfg clock property Christophe Roullier
2019-02-23 0:19 ` Rob Herring
2019-02-22 8:28 ` [PATCH V2 7/8] ARM: dts: stm32: Add Ethernet support on stm32h7 SOC and activate it for eval and disco boards Christophe Roullier
2019-02-22 8:28 ` [PATCH V2 8/8] ARM: dts: stm32: add syscfg clock support for Ethernet on STM32F429 SoC Christophe Roullier
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