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From: Stefan Roese <mail@roese.nl>
To: Pavel Machek <pavel@denx.de>, Dinh Nguyen <dinguyen@altera.com>
Cc: dzu@denx.de, netdev@vger.kernel.org, gsi@denx.de,
	peppe.cavallaro@st.com, s.trumtrar@pengutronix.de,
	linux-arm-kernel@lists.infradead.org
Subject: Re: socfpga/sockit ethernet problems
Date: Tue, 08 Jul 2014 09:47:37 +0200	[thread overview]
Message-ID: <53BBA219.8000607@roese.nl> (raw)
In-Reply-To: <20140707214340.GA29061@amd.pavel.ucw.cz>

Hi!

On 07.07.2014 23:43, Pavel Machek wrote:
>> All of this stuff is not needed as it's already taken care of by the
>> Micrel phy driver. The clock skew values are now represented in the DTS.
>> Please look at:
>>
>> Documentation/devicetree/bindings/net/micrel-ksz90x1.txt
>
> Aah, thanks for the pointer.
>
> At least socfpga_cyclone5_socrates.dts is in the mainline, but it does
> not have any skew configuration. That may explain why the board seems
> to have problems with ethernet... (or not).
>
> Are there suitable default values?
>
> u-boot uses these defaults:
>
> include/configs/socfpga_common.h:#define CONFIG_KSZ9021_CLK_SKEW_VAL
> 0xf0f0
> include/configs/socfpga_common.h:#define CONFIG_KSZ9021_DATA_SKEW_VAL
> 0x0
>
> ...that should correspond to txc-skew-ps == rxc-skew-ps == 3000, all
> other skew values == 0?
>
> Could someone with socrates board and network problems test if this
> makes any difference?

SoCrates uses a different PHY, the Lantiq PEF7071 (PHY11G). So those dts 
additions have no effect on SoCrates.

Thanks,
Stefan

  parent reply	other threads:[~2014-07-08  7:47 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2014-05-07 10:45 socfpga/sockit ethernet problems Pavel Machek
2014-05-08 15:28 ` Dinh Nguyen
2014-07-03  9:35 ` Pavel Machek
2014-07-07 20:25   ` Dinh Nguyen
2014-07-07 21:43     ` Pavel Machek
2014-07-08  7:19       ` Steffen Trumtrar
2014-07-14 12:36         ` Pavel Machek
2014-07-08  7:47       ` Stefan Roese [this message]
2014-07-14 12:34         ` Pavel Machek

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