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From: Florian Fainelli <f.fainelli@gmail.com>
To: Heiner Kallweit <hkallweit1@gmail.com>, DENG Qingfang <dqfext@gmail.com>
Cc: "David S. Miller" <davem@davemloft.net>,
	"Andrew Lunn" <andrew@lunn.ch>,
	"Jakub Kicinski" <kuba@kernel.org>,
	"Landen Chao" <Landen.Chao@mediatek.com>,
	"Marc Zyngier" <maz@kernel.org>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	"Russell King" <linux@armlinux.org.uk>,
	"Sean Wang" <sean.wang@mediatek.com>,
	"Thomas Gleixner" <tglx@linutronix.de>,
	"Vivien Didelot" <vivien.didelot@gmail.com>,
	"Vladimir Oltean" <olteanv@gmail.com>,
	linux-kernel@vger.kernel.org, netdev <netdev@vger.kernel.org>,
	"Weijie Gao" <weijie.gao@mediatek.com>,
	"Chuanhong Guo" <gch981213@gmail.com>,
	"Linus Walleij" <linus.walleij@linaro.org>,
	"René van Dorst" <opensource@vdorst.com>
Subject: Re: Registering IRQ for MT7530 internal PHYs
Date: Wed, 30 Dec 2020 08:15:54 -0800	[thread overview]
Message-ID: <546a8430-8865-1be8-4561-6681c7fa8ef8@gmail.com> (raw)
In-Reply-To: <fa7951e1-4a98-8488-d724-3eda9b97e376@gmail.com>



On 12/30/2020 1:12 AM, Heiner Kallweit wrote:
> On 30.12.2020 10:07, DENG Qingfang wrote:
>> Hi Heiner,
>> Thanks for your reply.
>>
>> On Wed, Dec 30, 2020 at 3:39 PM Heiner Kallweit <hkallweit1@gmail.com> wrote:
>>> I don't think that's the best option.
>>
>> I'm well aware of that.
>>
>>> You may want to add a PHY driver for your chip. Supposedly it
>>> supports at least PHY suspend/resume. You can use the RTL8366RB
>>> PHY driver as template.
>>
>> There's no MediaTek PHY driver yet. Do we really need a new one just
>> for the interrupts?
>>
> Not only for the interrupts. The genphy driver e.g. doesn't support
> PHY suspend/resume. And the PHY driver needs basically no code,
> just set the proper callbacks.

That statement about not supporting suspend/resume is not exactly true,
the generic "1g" PHY driver only implements suspend/resume through the
use of the standard BMCR power down bit, but not anything more
complicated than that.

Interrupt handling within the PHY itself is not defined by the existing
standard registers and will typically not reside in a standard register
space either, so just for that reason you do need a custom PHY driver.
There are other advantages if you need to expose additional PHY features
down the road like PHY counters, energy detection, automatic power down etc.

I don't believe we will see discrete/standalone Mediatek PHY chips, but
if that happens, then you would already have a framework for supporting
them.
-- 
Florian

  reply	other threads:[~2020-12-30 16:16 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-30  4:22 Registering IRQ for MT7530 internal PHYs DENG Qingfang
2020-12-30  7:39 ` Heiner Kallweit
2020-12-30  9:07   ` DENG Qingfang
2020-12-30  9:12     ` Heiner Kallweit
2020-12-30 16:15       ` Florian Fainelli [this message]
2020-12-30 16:53         ` Heiner Kallweit
2020-12-30  9:42 ` Marc Zyngier
2020-12-30 15:11   ` Andrew Lunn
2020-12-30 15:23   ` Andrew Lunn
2021-01-06  8:54     ` DENG Qingfang
2021-01-18 13:27       ` Landen Chao
2020-12-30 15:16 ` Andrew Lunn
2020-12-30 16:17   ` Florian Fainelli

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