From: Jose Abreu <Jose.Abreu@synopsys.com>
To: linux-kernel@vger.kernel.org, netdev@vger.kernel.org
Cc: Jose Abreu <Jose.Abreu@synopsys.com>,
Joao Pinto <Joao.Pinto@synopsys.com>,
"David S . Miller" <davem@davemloft.net>,
Giuseppe Cavallaro <peppe.cavallaro@st.com>,
Alexandre Torgue <alexandre.torgue@st.com>
Subject: [PATCH net-next 01/10] net: stmmac: dwxgmac: Enable EDMA by default
Date: Wed, 26 Jun 2019 15:47:35 +0200 [thread overview]
Message-ID: <6df599b8c2d57db9d82e42861ce897d7cf003424.1561556555.git.joabreu@synopsys.com> (raw)
In-Reply-To: <cover.1561556555.git.joabreu@synopsys.com>
In-Reply-To: <cover.1561556555.git.joabreu@synopsys.com>
Enable the EDMA feature by default which gives higher performance.
Signed-off-by: Jose Abreu <joabreu@synopsys.com>
Cc: Joao Pinto <jpinto@synopsys.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
---
drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 ++
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
index b8296eb41011..50b41ecb0325 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h
@@ -177,6 +177,8 @@
#define XGMAC_BLEN8 BIT(2)
#define XGMAC_BLEN4 BIT(1)
#define XGMAC_UNDEF BIT(0)
+#define XGMAC_TX_EDMA_CTRL 0x00003040
+#define XGMAC_RX_EDMA_CTRL 0x00003044
#define XGMAC_DMA_CH_CONTROL(x) (0x00003100 + (0x80 * (x)))
#define XGMAC_PBLx8 BIT(16)
#define XGMAC_DMA_CH_TX_CONTROL(x) (0x00003104 + (0x80 * (x)))
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
index 7861a938420a..a1ad49680c07 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_dma.c
@@ -122,6 +122,8 @@ static void dwxgmac2_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi)
}
writel(value, ioaddr + XGMAC_DMA_SYSBUS_MODE);
+ writel(GENMASK(29, 0), ioaddr + XGMAC_TX_EDMA_CTRL);
+ writel(GENMASK(29, 0), ioaddr + XGMAC_RX_EDMA_CTRL);
}
static void dwxgmac2_dma_rx_mode(void __iomem *ioaddr, int mode,
--
2.7.4
next prev parent reply other threads:[~2019-06-26 13:48 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-26 13:47 [PATCH net-next 00/10] net: stmmac: 10GbE using XGMAC Jose Abreu
2019-06-26 13:47 ` Jose Abreu [this message]
2019-06-26 16:33 ` [PATCH net-next 01/10] net: stmmac: dwxgmac: Enable EDMA by default David Miller
2019-06-26 13:47 ` [PATCH net-next 02/10] net: stmmac: Do not try to enable PHY EEE if MAC does not support it Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 03/10] net: stmmac: Decrease default RX Watchdog value Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 04/10] net: stmmac: dwxgmac: Fix the undefined burst setting Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 05/10] net: stmmac: Add the missing speeds that XGMAC supports Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 06/10] net: stmmac: Do not disable interrupts when cleaning TX Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 07/10] net: stmmac: Enable support for > 32 Bits addressing in XGMAC Jose Abreu
2019-06-26 20:19 ` Andrew Lunn
2019-06-27 7:54 ` Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 08/10] net: stmmac: Update RX Tail Pointer to last free entry Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 09/10] net: stmmac: Only disable interrupts if NAPI is scheduled Jose Abreu
2019-06-26 13:47 ` [PATCH net-next 10/10] net: stmmac: Try to get C45 PHY if everything else fails Jose Abreu
2019-06-26 20:01 ` Andrew Lunn
2019-06-27 7:54 ` Jose Abreu
2019-06-27 13:23 ` Andrew Lunn
2019-06-27 13:33 ` Jose Abreu
2019-06-27 14:03 ` Andrew Lunn
2019-06-28 7:27 ` Jose Abreu
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