From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2ADF4C282E1 for ; Thu, 25 Apr 2019 10:51:26 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EDC83217FA for ; Thu, 25 Apr 2019 10:51:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729031AbfDYKvW convert rfc822-to-8bit (ORCPT ); Thu, 25 Apr 2019 06:51:22 -0400 Received: from eu-smtp-delivery-151.mimecast.com ([146.101.78.151]:41443 "EHLO eu-smtp-delivery-151.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730520AbfDYKvV (ORCPT ); Thu, 25 Apr 2019 06:51:21 -0400 Received: from AcuMS.aculab.com (156.67.243.126 [156.67.243.126]) (Using TLS) by relay.mimecast.com with ESMTP id uk-mta-111-G6KENlWINbCq7VHD7b97yw-1; Thu, 25 Apr 2019 11:51:18 +0100 Received: from AcuMS.Aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) by AcuMS.aculab.com (fd9f:af1c:a25b:0:43c:695e:880f:8750) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Thu, 25 Apr 2019 11:52:30 +0100 Received: from AcuMS.Aculab.com ([fe80::43c:695e:880f:8750]) by AcuMS.aculab.com ([fe80::43c:695e:880f:8750%12]) with mapi id 15.00.1347.000; Thu, 25 Apr 2019 11:52:30 +0100 From: David Laight To: 'Fenghua Yu' , Thomas Gleixner , Ingo Molnar , Borislav Petkov , H Peter Anvin , Paolo Bonzini , Dave Hansen , Ashok Raj , Peter Zijlstra , Ravi V Shankar , "Xiaoyao Li " , Christopherson Sean J , Kalle Valo , "Michael Chan" CC: linux-kernel , x86 , "kvm@vger.kernel.org" , "netdev@vger.kernel.org" , "linux-wireless@vger.kernel.org" Subject: RE: [PATCH v8 13/15] x86/split_lock: Enable split lock detection by default Thread-Topic: [PATCH v8 13/15] x86/split_lock: Enable split lock detection by default Thread-Index: AQHU+tYCJUyDFc/Zd0WR7kUsRI2JUKZMsyTw Date: Thu, 25 Apr 2019 10:52:30 +0000 Message-ID: <762682ba43a0468897ff5ddbf6633d58@AcuMS.aculab.com> References: <1556134382-58814-1-git-send-email-fenghua.yu@intel.com> <1556134382-58814-14-git-send-email-fenghua.yu@intel.com> In-Reply-To: <1556134382-58814-14-git-send-email-fenghua.yu@intel.com> Accept-Language: en-GB, en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ms-exchange-transport-fromentityheader: Hosted x-originating-ip: [10.202.205.107] MIME-Version: 1.0 X-MC-Unique: G6KENlWINbCq7VHD7b97yw-1 X-Mimecast-Spam-Score: 0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: Fenghua Yu > Sent: 24 April 2019 20:33 > A split locked access locks bus and degrades overall memory access > performance. When split lock detection feature is enumerated, enable > the feature by default by writing 1 to bit 29 in MSR TEST_CTL to find > any split lock issue. You can't enable this by default until ALL the known potentially misaligned locked memory operations have been fixed. AFAICT you've only fixed the ones that have actually faulted. You've not even fixed the other ones in the same source files as ones you've 'fixed'. You need to do a code audit of all the in-tree kernel code that uses locked operations - especially the 'bit' ones since a lot of code casts the bitmap address - so it probably isn't long aligned. David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)