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[193.12.47.89]) by smtp.gmail.com with ESMTPSA id f3sm4046840ljm.5.2021.04.13.07.46.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Apr 2021 07:46:32 -0700 (PDT) From: Tobias Waldekranz To: Marek Behun Cc: Vladimir Oltean , Ansuel Smith , netdev@vger.kernel.org, "David S. Miller" , Jakub Kicinski , Andrew Lunn , Vivien Didelot , Florian Fainelli , Alexei Starovoitov , Daniel Borkmann , Andrii Nakryiko , Eric Dumazet , Wei Wang , Cong Wang , Taehee Yoo , =?utf-8?B?QmrDtnJuIFTDtnBlbA==?= , zhang kai , Weilong Chen , Roopa Prabhu , Di Zhu , Francis Laniel , linux-kernel@vger.kernel.org Subject: Re: [PATCH RFC net-next 0/3] Multi-CPU DSA support In-Reply-To: <20210413022730.2a51c083@thinkpad> References: <20210410133454.4768-1-ansuelsmth@gmail.com> <20210411200135.35fb5985@thinkpad> <20210411185017.3xf7kxzzq2vefpwu@skbuf> <878s5nllgs.fsf@waldekranz.com> <20210412213045.4277a598@thinkpad> <8735vvkxju.fsf@waldekranz.com> <20210412235054.73754df9@thinkpad> <87wnt7jgzk.fsf@waldekranz.com> <20210413005518.2f9b9cef@thinkpad> <87r1jfje26.fsf@waldekranz.com> <87o8ejjdu6.fsf@waldekranz.com> <20210413015450.1ae597da@thinkpad> <20210413022730.2a51c083@thinkpad> Date: Tue, 13 Apr 2021 16:46:32 +0200 Message-ID: <87im4qjl87.fsf@waldekranz.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Tue, Apr 13, 2021 at 02:27, Marek Behun wrote: > On Tue, 13 Apr 2021 01:54:50 +0200 > Marek Behun wrote: > >> I will look into this, maybe ask some follow-up questions. > > Tobias, > > it seems that currently the LAGs in mv88e6xxx driver do not use the > HashTrunk feature (which can be enabled via bit 11 of the > MV88E6XXX_G2_TRUNK_MAPPING register). This should be set at the bottom of mv88e6xxx_lag_sync_masks. > If we used this feature and if we knew what hash function it uses, we > could write a userspace tool that could recompute new MAC > addresses for the CPU ports in order to avoid the problem I explained > previously... > > Or the tool can simply inject frames into the switch and try different > MAC addresses for the CPU ports until desired load-balancing is reached. > > What do you think? As you concluded in your followup, not being able to have a fixed MAC for the CPU seems weird. Maybe you could do the inverse? Allow userspace to set the masks for an individual bond/team port in a hash-based LAG, then you can offload that to DSA. Here there be dragons though, you need to ensure that there is no intermediate config in which any buckets are enabled on multiple ports.