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From: Tobias Waldekranz <tobias@waldekranz.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Rasmus Villemoes <rasmus.villemoes@prevas.dk>,
	Network Development <netdev@vger.kernel.org>,
	Vivien Didelot <vivien.didelot@gmail.com>,
	Horatiu Vultur <horatiu.vultur@microchip.com>,
	Vladimir Oltean <olteanv@gmail.com>
Subject: Re: commit 4c7ea3c0791e (net: dsa: mv88e6xxx: disable SA learning for DSA and CPU ports)
Date: Mon, 18 Jan 2021 20:10:55 +0100	[thread overview]
Message-ID: <87r1mijc1s.fsf@waldekranz.com> (raw)
In-Reply-To: <YAXa+FkP3DHR9nlK@lunn.ch>

On Mon, Jan 18, 2021 at 20:01, Andrew Lunn <andrew@lunn.ch> wrote:
> On Mon, Jan 18, 2021 at 07:30:49PM +0100, Tobias Waldekranz wrote:
>> On Mon, Jan 18, 2021 at 18:50, Andrew Lunn <andrew@lunn.ch> wrote:
>> >> I suppose the real solution is having userspace do some "bridge mdb add"
>> >> yoga, but since no code currently uses
>> >> MV88E6XXX_G1_ATU_DATA_STATE_MC_STATIC_DA_MGMT, I don't think there's any
>> >> way to actually achieve this. And I have no idea how to represent the
>> >> requirement that "frames with this multicast DA are only to be directed
>> >> at the CPU" in a hardware-agnostic way.
>> >
>> > The switchdev interface for this exists, because there can be
>> > multicast listeners on the bridge. When they join a group, they ask
>> > the switch to put in a HOST MDB, which should cause the traffic for
>> 
>> That is not quite the same thing as "management" though. Adding the
>> group to the host MDB will not allow it to pass through blocked (in the
>> STP sense) ports for example. With a management entry, the switch will
>> trap the packet with a TO_CPU tag, which means no ingress policy can get
>> in the way of it reaching the CPU.
>
> Ah, yes. I don't suppose the DA is part of the special group which the
> switch will recognise as management and pass it on?
>
> 01:80:c2:00:00:00 - 01:80:c2:00:00:07
> 01:80:c2:00:00:08 - 01:80:c2:00:00:0f
> 01:80:c2:00:00:20 - 01:80:c2:00:00:27
> 01:80:c2:00:00:28 - 01:80:c2:00:00:2f

Unfortunately there are many protocols that live outside of the IEEE
range. ERP(S) which Rasmus was talking about uses a range assigned to
ITU IIRC. MRP a third one I believe.

The Reserved2CPU functionality has an additional deficiency vs. separate
management entries: they all use the same priority. This means that you
must assign LLDP frames to the same queue as STP for example, which is
typically not what you want. With a management entry (with priority
override) you can set them individually.

  reply	other threads:[~2021-01-18 19:12 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-14 13:49 Rasmus Villemoes
2021-01-16  1:42 ` Tobias Waldekranz
2021-01-18 15:41   ` Rasmus Villemoes
2021-01-18 17:50     ` Andrew Lunn
2021-01-18 18:30       ` Tobias Waldekranz
2021-01-18 19:01         ` Andrew Lunn
2021-01-18 19:10           ` Tobias Waldekranz [this message]
2021-01-18 21:19   ` Vladimir Oltean
2021-01-18 22:07     ` Rasmus Villemoes
2021-01-18 23:08       ` Tobias Waldekranz
2021-01-19  9:15       ` Horatiu Vultur

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