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[79.184.128.236]) by smtp.gmail.com with ESMTPSA id s4-20020a170906a18400b006f52dbc192bsm2043862ejy.37.2022.05.12.03.55.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 May 2022 03:55:25 -0700 (PDT) References: <20220424154028.1698685-1-xukuohai@huawei.com> <20220424154028.1698685-6-xukuohai@huawei.com> <87ilqdobl1.fsf@cloudflare.com> <5fb30cc0-dcf6-75ec-b6fa-38be3e99dca6@huawei.com> User-agent: mu4e 1.6.10; emacs 27.2 From: Jakub Sitnicki To: Xu Kuohai Cc: bpf@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-kselftest@vger.kernel.org, Catalin Marinas , Will Deacon , Steven Rostedt , Ingo Molnar , Daniel Borkmann , Alexei Starovoitov , Zi Shen Lim , Andrii Nakryiko , Martin KaFai Lau , Song Liu , Yonghong Song , John Fastabend , KP Singh , "David S . Miller" , Hideaki YOSHIFUJI , David Ahern , Thomas Gleixner , Borislav Petkov , Dave Hansen , x86@kernel.org, hpa@zytor.com, Shuah Khan , Jakub Kicinski , Jesper Dangaard Brouer , Mark Rutland , Pasha Tatashin , Ard Biesheuvel , Daniel Kiss , Steven Price , Sudeep Holla , Marc Zyngier , Peter Collingbourne , Mark Brown , Delyan Kratunov , Kumar Kartikeya Dwivedi Subject: Re: [PATCH bpf-next v3 5/7] bpf, arm64: Support to poke bpf prog Date: Thu, 12 May 2022 12:54:07 +0200 In-reply-to: <5fb30cc0-dcf6-75ec-b6fa-38be3e99dca6@huawei.com> Message-ID: <87wneryq8z.fsf@cloudflare.com> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Wed, May 11, 2022 at 11:12 AM +08, Xu Kuohai wrote: > On 5/10/2022 5:36 PM, Jakub Sitnicki wrote: >> On Sun, Apr 24, 2022 at 11:40 AM -04, Xu Kuohai wrote: [...] >>> @@ -281,12 +290,15 @@ static int build_prologue(struct jit_ctx *ctx, bool ebpf_from_cbpf) >>> * >>> */ >>> >>> + if (IS_ENABLED(CONFIG_ARM64_BTI_KERNEL)) >>> + emit(A64_BTI_C, ctx); >> >> I'm no arm64 expert, but this looks like a fix for BTI. >> >> Currently we never emit BTI because ARM64_BTI_KERNEL depends on >> ARM64_PTR_AUTH_KERNEL, while BTI must be the first instruction for the >> jump target [1]. Am I following correctly? >> >> [1] https://lwn.net/Articles/804982/ >> > > Not quite correct. When the jump target is a PACIASP instruction, no > Branch Target Exception is generated, so there is no need to insert a > BTI before PACIASP [2]. > > In order to attach trampoline to bpf prog, a MOV and NOP are inserted > before the PACIASP, so BTI instruction is required to avoid Branch > Target Exception. > > The reason for inserting NOP before PACIASP instead of after PACIASP is > that no call frame is built before entering trampoline, so there is no > return address on the stack and nothing to be protected by PACIASP. > > [2] > https://developer.arm.com/documentation/ddi0596/2021-12/Base-Instructions/BTI--Branch-Target-Identification-?lang=en That makes sense. Thanks for the explanation!