From: "Y.b. Lu" <yangbo.lu@nxp.com>
To: Vladimir Oltean <olteanv@gmail.com>,
Richard Cochran <richardcochran@gmail.com>
Cc: lkml <linux-kernel@vger.kernel.org>,
netdev <netdev@vger.kernel.org>,
"David S . Miller" <davem@davemloft.net>,
Vladimir Oltean <vladimir.oltean@nxp.com>,
Claudiu Manoil <claudiu.manoil@nxp.com>,
Andrew Lunn <andrew@lunn.ch>,
Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
Subject: RE: [PATCH 6/6] ptp_ocelot: support 4 programmable pins
Date: Tue, 24 Mar 2020 05:21:27 +0000 [thread overview]
Message-ID: <AM7PR04MB6885A8C98CA60FC435024647F8F10@AM7PR04MB6885.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <CA+h21hoBwDuWCFbO70u1FAERB8zc5F+H5URBkn=2_bpRRRz1oA@mail.gmail.com>
Hi Vladimir and Richard,
> -----Original Message-----
> From: Vladimir Oltean <olteanv@gmail.com>
> Sent: Friday, March 20, 2020 9:21 PM
> To: Y.b. Lu <yangbo.lu@nxp.com>
> Cc: lkml <linux-kernel@vger.kernel.org>; netdev <netdev@vger.kernel.org>;
> David S . Miller <davem@davemloft.net>; Richard Cochran
> <richardcochran@gmail.com>; Vladimir Oltean <vladimir.oltean@nxp.com>;
> Claudiu Manoil <claudiu.manoil@nxp.com>; Andrew Lunn <andrew@lunn.ch>;
> Vivien Didelot <vivien.didelot@gmail.com>; Florian Fainelli
> <f.fainelli@gmail.com>; Alexandre Belloni <alexandre.belloni@bootlin.com>;
> Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>
> Subject: Re: [PATCH 6/6] ptp_ocelot: support 4 programmable pins
>
> Hi Yangbo,
>
> On Fri, 20 Mar 2020 at 12:42, Yangbo Lu <yangbo.lu@nxp.com> wrote:
> >
> > Support 4 programmable pins for only one function periodic
> > signal for now. Since the hardware is not able to support
> > absolute start time, driver starts periodic signal immediately.
> >
>
> Are you absolutely sure it doesn't support absolute start time?
> Because that would mean it's pretty useless if the phase of the PTP
> clock signal is out of control.
I'm absolutely sure that absolute start time is not supported for periodic clock unless reference manual is wrong.
And I don’t think we need to consider phase for periodic clock which is with a specified period.
But PPS is different. Pulse should be generated must after seconds increased.
The waveform_high/low should be configurable for phase and pulse width if supported.
This is supported by hardware but was not implemented by this patch. I was considering to add later.
In my one previous patch, I was suggested to implement PPS with programmable pin periodic clock function.
But I didn’t find how should PPS be implemented with periodic clock function after checking ptp driver.
https://patchwork.ozlabs.org/patch/1215464/
Vladimir talked with me, for the special PPS case, we may consider,
if (req.perout.period.sec ==1 && req.perout.period.nsec == 0) and configure WAVEFORM_LOW to be equal to req_perout.start.nsec.
Richard, do you think is it ok?
And another problem I am facing is, in .enable() callback (PTP_CLK_REQ_PEROUT request) I defined.
/*
* TODO: support disabling function
* When ptp_disable_pinfunc() is to disable function,
* it has already held pincfg_mux.
* However ptp_find_pin() in .enable() called also needs
* to hold pincfg_mux.
* This causes dead lock. So, just return for function
* disabling, and this needs fix-up.
*/
Hope some suggestions here.
Thanks a lot.
>
> I tested your patch on the LS1028A-RDB board using the following commands:
>
> # Select PEROUT function and assign a channel to each of pins
> SWITCH_1588_DAT0 and SWITCH_1588_DAT1
> echo '2 0' > /sys/class/ptp/ptp1/pins/switch_1588_dat0
> echo '2 1' > /sys/class/ptp/ptp1/pins/switch_1588_dat1
> # Generate pulses with 1 second period on channel 0
> echo '0 0 0 1 0' > /sys/class/ptp/ptp1/period
> # Generate pulses with 1 second period on channel 1
> echo '1 0 0 1 0' > /sys/class/ptp/ptp1/period
>
> And here is what I get:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fdrive.g
> oogle.com%2Fopen%3Fid%3D1ErWufJL0TWv6hKDQdF1pRL5gn4hn4X-r&
> data=02%7C01%7Cyangbo.lu%40nxp.com%7Cbd3e65bdaabb4999737d08d7c
> cd17eee%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C63720307
> 2457124468&sdata=4D97D9ZoA%2FDJeSAN%2Fha4zNuZL6GwRLNxpNY
> QiLsOsyM%3D&reserved=0
>
> So the periodic output really starts 'now' just like the print says,
> so the output from DAT0 is not even in sync with DAT1.
>
> > Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
> > ---
>
> Thanks,
> -Vladimir
next prev parent reply other threads:[~2020-03-24 5:22 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-20 10:37 [PATCH 0/6] Support programmable pins for Ocelot PTP driver Yangbo Lu
2020-03-20 10:37 ` [PATCH 1/6] ptp: move ocelot ptp clock code out of Ethernet driver Yangbo Lu
2020-03-20 16:37 ` Vladimir Oltean
2020-03-24 4:46 ` Y.b. Lu
2020-03-20 21:31 ` kbuild test robot
2020-03-20 23:03 ` kbuild test robot
2020-03-20 10:37 ` [PATCH 2/6] MAINTAINERS: add entry for Microsemi Ocelot PTP driver Yangbo Lu
2020-03-20 17:28 ` Alexandre Belloni
2020-03-24 4:50 ` Y.b. Lu
2020-03-20 10:37 ` [PATCH 3/6] net: mscc: ocelot: fix timestamp info if ptp clock does not work Yangbo Lu
2020-03-20 10:37 ` [PATCH 4/6] net: mscc: ocelot: redefine PTP pins Yangbo Lu
2020-03-20 10:37 ` [PATCH 5/6] net: mscc: ocelot: add wave programming registers definitions Yangbo Lu
2020-03-20 10:37 ` [PATCH 6/6] ptp_ocelot: support 4 programmable pins Yangbo Lu
2020-03-20 13:20 ` Vladimir Oltean
2020-03-24 5:21 ` Y.b. Lu [this message]
2020-03-24 13:19 ` Richard Cochran
2020-03-25 3:20 ` Y.b. Lu
2020-03-24 9:24 ` Horatiu Vultur
2020-03-24 13:07 ` Richard Cochran
2020-03-25 3:08 ` Y.b. Lu
2020-03-25 13:41 ` Richard Cochran
2020-03-26 9:34 ` Y.b. Lu
2020-03-26 13:59 ` Richard Cochran
2020-03-27 5:47 ` Y.b. Lu
2020-03-31 4:18 ` Y.b. Lu
2020-03-25 13:15 ` Richard Cochran
2020-03-26 9:25 ` Y.b. Lu
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