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* [PATCH 1/2] igb: Remove duplicate defines
@ 2022-05-11 12:28 Kai-Heng Feng
  2022-05-11 12:28 ` [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link Kai-Heng Feng
  0 siblings, 1 reply; 7+ messages in thread
From: Kai-Heng Feng @ 2022-05-11 12:28 UTC (permalink / raw)
  To: jesse.brandeburg, anthony.l.nguyen
  Cc: Kai-Heng Feng, David S. Miller, Eric Dumazet, Jakub Kicinski,
	Paolo Abeni, intel-wired-lan, netdev, linux-kernel

There's no need to define same thing twice.

Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
---
 drivers/net/ethernet/intel/igb/e1000_defines.h | 3 ---
 drivers/net/ethernet/intel/igb/e1000_regs.h    | 1 -
 2 files changed, 4 deletions(-)

diff --git a/drivers/net/ethernet/intel/igb/e1000_defines.h b/drivers/net/ethernet/intel/igb/e1000_defines.h
index ca5429774994e..fa028928482fc 100644
--- a/drivers/net/ethernet/intel/igb/e1000_defines.h
+++ b/drivers/net/ethernet/intel/igb/e1000_defines.h
@@ -1033,9 +1033,6 @@
 #define E1000_VFTA_ENTRY_MASK                0x7F
 #define E1000_VFTA_ENTRY_BIT_SHIFT_MASK      0x1F
 
-/* DMA Coalescing register fields */
-#define E1000_PCIEMISC_LX_DECISION      0x00000080 /* Lx power on DMA coal */
-
 /* Tx Rate-Scheduler Config fields */
 #define E1000_RTTBCNRC_RS_ENA		0x80000000
 #define E1000_RTTBCNRC_RF_DEC_MASK	0x00003FFF
diff --git a/drivers/net/ethernet/intel/igb/e1000_regs.h b/drivers/net/ethernet/intel/igb/e1000_regs.h
index 9cb49980ec2d1..eb9f6da9208a6 100644
--- a/drivers/net/ethernet/intel/igb/e1000_regs.h
+++ b/drivers/net/ethernet/intel/igb/e1000_regs.h
@@ -116,7 +116,6 @@
 #define E1000_DMCRTRH	0x05DD0 /* Receive Packet Rate Threshold */
 #define E1000_DMCCNT	0x05DD4 /* Current Rx Count */
 #define E1000_FCRTC	0x02170 /* Flow Control Rx high watermark */
-#define E1000_PCIEMISC	0x05BB8 /* PCIE misc config register */
 
 /* TX Rate Limit Registers */
 #define E1000_RTTDQSEL	0x3604 /* Tx Desc Plane Queue Select - WO */
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link
  2022-05-11 12:28 [PATCH 1/2] igb: Remove duplicate defines Kai-Heng Feng
@ 2022-05-11 12:28 ` Kai-Heng Feng
  2022-05-11 12:49   ` [Intel-wired-lan] " Paul Menzel
  0 siblings, 1 reply; 7+ messages in thread
From: Kai-Heng Feng @ 2022-05-11 12:28 UTC (permalink / raw)
  To: jesse.brandeburg, anthony.l.nguyen
  Cc: Kai-Heng Feng, David S. Miller, Eric Dumazet, Jakub Kicinski,
	Paolo Abeni, intel-wired-lan, netdev, linux-kernel

We found Intel I210 can only achieve ~750Mbps Tx speed on some
platforms. The RR2DCDELAY shows around 0x2xxx DMA delay, which will be
significantly lower when 1) ASPM is disabled or 2) SoC package c-state
stays above PC3. When the RR2DCDELAY is around 0x1xxx the Tx speed can
reach to ~950Mbps.

According to the I210 datasheet "8.26.1 PCIe Misc. Register - PCIEMISC",
"DMA Idle Indication" doesn't seem to tie to DMA coalesce anymore, so
set it to 1b for "DMA is considered idle when there is no Rx or Tx AND
when there are no TLPs indicating that CPU is active detected on the
PCIe link (such as the host executes CSR or Configuration register read
or write operation)" and performing Tx should also fall under "active
CPU on PCIe link" case.

In addition to that, commit b6e0c419f040 ("igb: Move DMA Coalescing init
code to separate function.") seems to wrongly changed from enabling
E1000_PCIEMISC_LX_DECISION to disabling it, also fix that.

Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
---
 drivers/net/ethernet/intel/igb/igb_main.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
index 34b33b21e0dcd..eca797dded429 100644
--- a/drivers/net/ethernet/intel/igb/igb_main.c
+++ b/drivers/net/ethernet/intel/igb/igb_main.c
@@ -9897,11 +9897,10 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
 	struct e1000_hw *hw = &adapter->hw;
 	u32 dmac_thr;
 	u16 hwm;
+	u32 reg;
 
 	if (hw->mac.type > e1000_82580) {
 		if (adapter->flags & IGB_FLAG_DMAC) {
-			u32 reg;
-
 			/* force threshold to 0. */
 			wr32(E1000_DMCTXTH, 0);
 
@@ -9934,7 +9933,6 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
 			/* Disable BMC-to-OS Watchdog Enable */
 			if (hw->mac.type != e1000_i354)
 				reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
-
 			wr32(E1000_DMACR, reg);
 
 			/* no lower threshold to disable
@@ -9951,12 +9949,12 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
 			 */
 			wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
 			     (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
+		}
 
-			/* make low power state decision controlled
-			 * by DMA coal
-			 */
+		if (hw->mac.type >= e1000_i210 ||
+		    (adapter->flags & IGB_FLAG_DMAC)) {
 			reg = rd32(E1000_PCIEMISC);
-			reg &= ~E1000_PCIEMISC_LX_DECISION;
+			reg |= E1000_PCIEMISC_LX_DECISION;
 			wr32(E1000_PCIEMISC, reg);
 		} /* endif adapter->dmac is not disabled */
 	} else if (hw->mac.type == e1000_82580) {
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 7+ messages in thread

* Re: [Intel-wired-lan] [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link
  2022-05-11 12:28 ` [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link Kai-Heng Feng
@ 2022-05-11 12:49   ` Paul Menzel
  2022-05-12  2:55     ` Kai-Heng Feng
  0 siblings, 1 reply; 7+ messages in thread
From: Paul Menzel @ 2022-05-11 12:49 UTC (permalink / raw)
  To: Kai-Heng Feng
  Cc: jesse.brandeburg, anthony.l.nguyen, netdev, linux-kernel,
	Eric Dumazet, intel-wired-lan, Jakub Kicinski, Paolo Abeni,
	David S. Miller

Dear Kai-Hang,


Thank you for the patch.


Am 11.05.22 um 14:28 schrieb Kai-Heng Feng:
> We found Intel I210 can only achieve ~750Mbps Tx speed on some
> platforms. The RR2DCDELAY shows around 0x2xxx DMA delay, which will be

Please give an example platform, where it works and where it does not.

How did you test transfer speed?

> significantly lower when 1) ASPM is disabled or 2) SoC package c-state
> stays above PC3. When the RR2DCDELAY is around 0x1xxx the Tx speed can
> reach to ~950Mbps.
> 
> According to the I210 datasheet "8.26.1 PCIe Misc. Register - PCIEMISC",
> "DMA Idle Indication" doesn't seem to tie to DMA coalesce anymore, so
> set it to 1b for "DMA is considered idle when there is no Rx or Tx AND
> when there are no TLPs indicating that CPU is active detected on the
> PCIe link (such as the host executes CSR or Configuration register read
> or write operation)" and performing Tx should also fall under "active
> CPU on PCIe link" case.
> 
> In addition to that, commit b6e0c419f040 ("igb: Move DMA Coalescing init
> code to separate function.") seems to wrongly changed from enabling
> E1000_PCIEMISC_LX_DECISION to disabling it, also fix that.

Please split this into a separate commit with Fixes tag, and maybe the 
commit author in Cc.


Kind regards,

Paul


> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
> ---
>   drivers/net/ethernet/intel/igb/igb_main.c | 12 +++++-------
>   1 file changed, 5 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
> index 34b33b21e0dcd..eca797dded429 100644
> --- a/drivers/net/ethernet/intel/igb/igb_main.c
> +++ b/drivers/net/ethernet/intel/igb/igb_main.c
> @@ -9897,11 +9897,10 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
>   	struct e1000_hw *hw = &adapter->hw;
>   	u32 dmac_thr;
>   	u16 hwm;
> +	u32 reg;
>   
>   	if (hw->mac.type > e1000_82580) {
>   		if (adapter->flags & IGB_FLAG_DMAC) {
> -			u32 reg;
> -
>   			/* force threshold to 0. */
>   			wr32(E1000_DMCTXTH, 0);
>   
> @@ -9934,7 +9933,6 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
>   			/* Disable BMC-to-OS Watchdog Enable */
>   			if (hw->mac.type != e1000_i354)
>   				reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
> -
>   			wr32(E1000_DMACR, reg);
>   
>   			/* no lower threshold to disable
> @@ -9951,12 +9949,12 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
>   			 */
>   			wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
>   			     (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
> +		}
>   
> -			/* make low power state decision controlled
> -			 * by DMA coal
> -			 */
> +		if (hw->mac.type >= e1000_i210 ||
> +		    (adapter->flags & IGB_FLAG_DMAC)) {
>   			reg = rd32(E1000_PCIEMISC);
> -			reg &= ~E1000_PCIEMISC_LX_DECISION;
> +			reg |= E1000_PCIEMISC_LX_DECISION;
>   			wr32(E1000_PCIEMISC, reg);
>   		} /* endif adapter->dmac is not disabled */
>   	} else if (hw->mac.type == e1000_82580) {

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-wired-lan] [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link
  2022-05-11 12:49   ` [Intel-wired-lan] " Paul Menzel
@ 2022-05-12  2:55     ` Kai-Heng Feng
  2022-05-20  2:45       ` Kai-Heng Feng
  0 siblings, 1 reply; 7+ messages in thread
From: Kai-Heng Feng @ 2022-05-12  2:55 UTC (permalink / raw)
  To: Paul Menzel
  Cc: jesse.brandeburg, anthony.l.nguyen, netdev, linux-kernel,
	Eric Dumazet, intel-wired-lan, Jakub Kicinski, Paolo Abeni,
	David S. Miller

Hi Paul,

On Wed, May 11, 2022 at 8:49 PM Paul Menzel <pmenzel@molgen.mpg.de> wrote:
>
> Dear Kai-Hang,
>
>
> Thank you for the patch.
>
>
> Am 11.05.22 um 14:28 schrieb Kai-Heng Feng:
> > We found Intel I210 can only achieve ~750Mbps Tx speed on some
> > platforms. The RR2DCDELAY shows around 0x2xxx DMA delay, which will be
>
> Please give an example platform, where it works and where it does not.

The platform is about but not yet hit the market yet, so I can't disclose it.
They are Intel Alder Lake based.

>
> How did you test transfer speed?

Iperf.

>
> > significantly lower when 1) ASPM is disabled or 2) SoC package c-state
> > stays above PC3. When the RR2DCDELAY is around 0x1xxx the Tx speed can
> > reach to ~950Mbps.
> >
> > According to the I210 datasheet "8.26.1 PCIe Misc. Register - PCIEMISC",
> > "DMA Idle Indication" doesn't seem to tie to DMA coalesce anymore, so
> > set it to 1b for "DMA is considered idle when there is no Rx or Tx AND
> > when there are no TLPs indicating that CPU is active detected on the
> > PCIe link (such as the host executes CSR or Configuration register read
> > or write operation)" and performing Tx should also fall under "active
> > CPU on PCIe link" case.
> >
> > In addition to that, commit b6e0c419f040 ("igb: Move DMA Coalescing init
> > code to separate function.") seems to wrongly changed from enabling
> > E1000_PCIEMISC_LX_DECISION to disabling it, also fix that.
>
> Please split this into a separate commit with Fixes tag, and maybe the
> commit author in Cc.

I don't see the need to split to separate commit as both require the
same change.

I will add the "Fixes" tag once the igb maintainers reviewed the patch.

Kai-Heng

>
>
> Kind regards,
>
> Paul
>
>
> > Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
> > ---
> >   drivers/net/ethernet/intel/igb/igb_main.c | 12 +++++-------
> >   1 file changed, 5 insertions(+), 7 deletions(-)
> >
> > diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
> > index 34b33b21e0dcd..eca797dded429 100644
> > --- a/drivers/net/ethernet/intel/igb/igb_main.c
> > +++ b/drivers/net/ethernet/intel/igb/igb_main.c
> > @@ -9897,11 +9897,10 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
> >       struct e1000_hw *hw = &adapter->hw;
> >       u32 dmac_thr;
> >       u16 hwm;
> > +     u32 reg;
> >
> >       if (hw->mac.type > e1000_82580) {
> >               if (adapter->flags & IGB_FLAG_DMAC) {
> > -                     u32 reg;
> > -
> >                       /* force threshold to 0. */
> >                       wr32(E1000_DMCTXTH, 0);
> >
> > @@ -9934,7 +9933,6 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
> >                       /* Disable BMC-to-OS Watchdog Enable */
> >                       if (hw->mac.type != e1000_i354)
> >                               reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
> > -
> >                       wr32(E1000_DMACR, reg);
> >
> >                       /* no lower threshold to disable
> > @@ -9951,12 +9949,12 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
> >                        */
> >                       wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
> >                            (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
> > +             }
> >
> > -                     /* make low power state decision controlled
> > -                      * by DMA coal
> > -                      */
> > +             if (hw->mac.type >= e1000_i210 ||
> > +                 (adapter->flags & IGB_FLAG_DMAC)) {
> >                       reg = rd32(E1000_PCIEMISC);
> > -                     reg &= ~E1000_PCIEMISC_LX_DECISION;
> > +                     reg |= E1000_PCIEMISC_LX_DECISION;
> >                       wr32(E1000_PCIEMISC, reg);
> >               } /* endif adapter->dmac is not disabled */
> >       } else if (hw->mac.type == e1000_82580) {

^ permalink raw reply	[flat|nested] 7+ messages in thread

* Re: [Intel-wired-lan] [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link
  2022-05-12  2:55     ` Kai-Heng Feng
@ 2022-05-20  2:45       ` Kai-Heng Feng
  2022-05-25  8:12         ` Palczewski, Mateusz
  0 siblings, 1 reply; 7+ messages in thread
From: Kai-Heng Feng @ 2022-05-20  2:45 UTC (permalink / raw)
  To: Paul Menzel
  Cc: jesse.brandeburg, anthony.l.nguyen, netdev, linux-kernel,
	Eric Dumazet, intel-wired-lan, Jakub Kicinski, Paolo Abeni,
	David S. Miller

On Thu, May 12, 2022 at 10:55 AM Kai-Heng Feng
<kai.heng.feng@canonical.com> wrote:
>
> Hi Paul,
>
> On Wed, May 11, 2022 at 8:49 PM Paul Menzel <pmenzel@molgen.mpg.de> wrote:
> >
> > Dear Kai-Hang,
> >
> >
> > Thank you for the patch.
> >
> >
> > Am 11.05.22 um 14:28 schrieb Kai-Heng Feng:
> > > We found Intel I210 can only achieve ~750Mbps Tx speed on some
> > > platforms. The RR2DCDELAY shows around 0x2xxx DMA delay, which will be
> >
> > Please give an example platform, where it works and where it does not.
>
> The platform is about but not yet hit the market yet, so I can't disclose it.
> They are Intel Alder Lake based.
>
> >
> > How did you test transfer speed?
>
> Iperf.
>
> >
> > > significantly lower when 1) ASPM is disabled or 2) SoC package c-state
> > > stays above PC3. When the RR2DCDELAY is around 0x1xxx the Tx speed can
> > > reach to ~950Mbps.
> > >
> > > According to the I210 datasheet "8.26.1 PCIe Misc. Register - PCIEMISC",
> > > "DMA Idle Indication" doesn't seem to tie to DMA coalesce anymore, so
> > > set it to 1b for "DMA is considered idle when there is no Rx or Tx AND
> > > when there are no TLPs indicating that CPU is active detected on the
> > > PCIe link (such as the host executes CSR or Configuration register read
> > > or write operation)" and performing Tx should also fall under "active
> > > CPU on PCIe link" case.
> > >
> > > In addition to that, commit b6e0c419f040 ("igb: Move DMA Coalescing init
> > > code to separate function.") seems to wrongly changed from enabling
> > > E1000_PCIEMISC_LX_DECISION to disabling it, also fix that.
> >
> > Please split this into a separate commit with Fixes tag, and maybe the
> > commit author in Cc.
>
> I don't see the need to split to separate commit as both require the
> same change.
>
> I will add the "Fixes" tag once the igb maintainers reviewed the patch.

A gentle ping...

Please let me know if this is a proper fix so I can send v2.

Kai-Heng

>
> Kai-Heng
>
> >
> >
> > Kind regards,
> >
> > Paul
> >
> >
> > > Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
> > > ---
> > >   drivers/net/ethernet/intel/igb/igb_main.c | 12 +++++-------
> > >   1 file changed, 5 insertions(+), 7 deletions(-)
> > >
> > > diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c
> > > index 34b33b21e0dcd..eca797dded429 100644
> > > --- a/drivers/net/ethernet/intel/igb/igb_main.c
> > > +++ b/drivers/net/ethernet/intel/igb/igb_main.c
> > > @@ -9897,11 +9897,10 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
> > >       struct e1000_hw *hw = &adapter->hw;
> > >       u32 dmac_thr;
> > >       u16 hwm;
> > > +     u32 reg;
> > >
> > >       if (hw->mac.type > e1000_82580) {
> > >               if (adapter->flags & IGB_FLAG_DMAC) {
> > > -                     u32 reg;
> > > -
> > >                       /* force threshold to 0. */
> > >                       wr32(E1000_DMCTXTH, 0);
> > >
> > > @@ -9934,7 +9933,6 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
> > >                       /* Disable BMC-to-OS Watchdog Enable */
> > >                       if (hw->mac.type != e1000_i354)
> > >                               reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
> > > -
> > >                       wr32(E1000_DMACR, reg);
> > >
> > >                       /* no lower threshold to disable
> > > @@ -9951,12 +9949,12 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
> > >                        */
> > >                       wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
> > >                            (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
> > > +             }
> > >
> > > -                     /* make low power state decision controlled
> > > -                      * by DMA coal
> > > -                      */
> > > +             if (hw->mac.type >= e1000_i210 ||
> > > +                 (adapter->flags & IGB_FLAG_DMAC)) {
> > >                       reg = rd32(E1000_PCIEMISC);
> > > -                     reg &= ~E1000_PCIEMISC_LX_DECISION;
> > > +                     reg |= E1000_PCIEMISC_LX_DECISION;
> > >                       wr32(E1000_PCIEMISC, reg);
> > >               } /* endif adapter->dmac is not disabled */
> > >       } else if (hw->mac.type == e1000_82580) {

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [Intel-wired-lan] [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link
  2022-05-20  2:45       ` Kai-Heng Feng
@ 2022-05-25  8:12         ` Palczewski, Mateusz
  2022-06-14 14:58           ` G, GurucharanX
  0 siblings, 1 reply; 7+ messages in thread
From: Palczewski, Mateusz @ 2022-05-25  8:12 UTC (permalink / raw)
  To: Kai-Heng Feng, Paul Menzel, intel-wired-lan
  Cc: netdev, linux-kernel, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
	David S. Miller

>
>On Thu, May 12, 2022 at 10:55 AM Kai-Heng Feng <kai.heng.feng@canonical.com> wrote:
>>
>> Hi Paul,
>>
>> On Wed, May 11, 2022 at 8:49 PM Paul Menzel <pmenzel@molgen.mpg.de> wrote:
>> >
>> > Dear Kai-Hang,
>> >
>> >
>> > Thank you for the patch.
>> >
>> >
>> > Am 11.05.22 um 14:28 schrieb Kai-Heng Feng:
>> > > We found Intel I210 can only achieve ~750Mbps Tx speed on some 
>> > > platforms. The RR2DCDELAY shows around 0x2xxx DMA delay, which 
>> > > will be
>> >
>> > Please give an example platform, where it works and where it does not.
>>
>> The platform is about but not yet hit the market yet, so I can't disclose it.
>> They are Intel Alder Lake based.
>>
>> >
>> > How did you test transfer speed?
>>
>> Iperf.
>>
>> >
>> > > significantly lower when 1) ASPM is disabled or 2) SoC package 
>> > > c-state stays above PC3. When the RR2DCDELAY is around 0x1xxx the 
>> > > Tx speed can reach to ~950Mbps.
>> > >
>> > > According to the I210 datasheet "8.26.1 PCIe Misc. Register - 
>> > > PCIEMISC", "DMA Idle Indication" doesn't seem to tie to DMA 
>> > > coalesce anymore, so set it to 1b for "DMA is considered idle when 
>> > > there is no Rx or Tx AND when there are no TLPs indicating that 
>> > > CPU is active detected on the PCIe link (such as the host executes 
>> > > CSR or Configuration register read or write operation)" and 
>> > > performing Tx should also fall under "active CPU on PCIe link" case.
>> > >
>> > > In addition to that, commit b6e0c419f040 ("igb: Move DMA 
>> > > Coalescing init code to separate function.") seems to wrongly 
>> > > changed from enabling E1000_PCIEMISC_LX_DECISION to disabling it, also fix that.
>> >
>> > Please split this into a separate commit with Fixes tag, and maybe 
>> > the commit author in Cc.
>>
>> I don't see the need to split to separate commit as both require the 
>> same change.
>>
>> I will add the "Fixes" tag once the igb maintainers reviewed the patch.
>
>A gentle ping...
>
>Please let me know if this is a proper fix so I can send v2.
>
>Kai-Heng
>
Hi,
Looking good to me. Waiting for v2 version with fixes tag and then 
this will be fully accepted. 

Regards,
Mateusz 
>>
>> Kai-Heng
>>
>> >
>> >
>> > Kind regards,
>> >
>> > Paul
>> >
>> >
>> > > Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com>
>> > > ---
>> > >   drivers/net/ethernet/intel/igb/igb_main.c | 12 +++++-------
>> > >   1 file changed, 5 insertions(+), 7 deletions(-)
>> > >
>> > > diff --git a/drivers/net/ethernet/intel/igb/igb_main.c 
>> > > b/drivers/net/ethernet/intel/igb/igb_main.c
>> > > index 34b33b21e0dcd..eca797dded429 100644
>> > > --- a/drivers/net/ethernet/intel/igb/igb_main.c
>> > > +++ b/drivers/net/ethernet/intel/igb/igb_main.c
>> > > @@ -9897,11 +9897,10 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
>> > >       struct e1000_hw *hw = &adapter->hw;
>> > >       u32 dmac_thr;
>> > >       u16 hwm;
>> > > +     u32 reg;
>> > >
>> > >       if (hw->mac.type > e1000_82580) {
>> > >               if (adapter->flags & IGB_FLAG_DMAC) {
>> > > -                     u32 reg;
>> > > -
>> > >                       /* force threshold to 0. */
>> > >                       wr32(E1000_DMCTXTH, 0);
>> > >
>> > > @@ -9934,7 +9933,6 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
>> > >                       /* Disable BMC-to-OS Watchdog Enable */
>> > >                       if (hw->mac.type != e1000_i354)
>> > >                               reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
>> > > -
>> > >                       wr32(E1000_DMACR, reg);
>> > >
>> > >                       /* no lower threshold to disable @@ -9951,12 
>> > > +9949,12 @@ static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
>> > >                        */
>> > >                       wr32(E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
>> > >                            (IGB_TX_BUF_4096 + 
>> > > adapter->max_frame_size)) >> 6);
>> > > +             }
>> > >
>> > > -                     /* make low power state decision controlled
>> > > -                      * by DMA coal
>> > > -                      */
>> > > +             if (hw->mac.type >= e1000_i210 ||
>> > > +                 (adapter->flags & IGB_FLAG_DMAC)) {
>> > >                       reg = rd32(E1000_PCIEMISC);
>> > > -                     reg &= ~E1000_PCIEMISC_LX_DECISION;
>> > > +                     reg |= E1000_PCIEMISC_LX_DECISION;
>> > >                       wr32(E1000_PCIEMISC, reg);
>> > >               } /* endif adapter->dmac is not disabled */
>> > >       } else if (hw->mac.type == e1000_82580) {
>
>

^ permalink raw reply	[flat|nested] 7+ messages in thread

* RE: [Intel-wired-lan] [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link
  2022-05-25  8:12         ` Palczewski, Mateusz
@ 2022-06-14 14:58           ` G, GurucharanX
  0 siblings, 0 replies; 7+ messages in thread
From: G, GurucharanX @ 2022-06-14 14:58 UTC (permalink / raw)
  To: Palczewski, Mateusz, Kai-Heng Feng, Paul Menzel, intel-wired-lan
  Cc: netdev, linux-kernel, Eric Dumazet, Jakub Kicinski, Paolo Abeni,
	David S. Miller



> -----Original Message-----
> From: Intel-wired-lan <intel-wired-lan-bounces@osuosl.org> On Behalf Of
> Palczewski, Mateusz
> Sent: Wednesday, May 25, 2022 1:43 PM
> To: Kai-Heng Feng <kai.heng.feng@canonical.com>; Paul Menzel
> <pmenzel@molgen.mpg.de>; intel-wired-lan@lists.osuosl.org
> Cc: netdev@vger.kernel.org; linux-kernel@vger.kernel.org; Eric Dumazet
> <edumazet@google.com>; Jakub Kicinski <kuba@kernel.org>; Paolo Abeni
> <pabeni@redhat.com>; David S. Miller <davem@davemloft.net>
> Subject: Re: [Intel-wired-lan] [PATCH 2/2] igb: Make DMA faster when CPU is
> active on the PCIe link
> 
>   drivers/net/ethernet/intel/igb/igb_main.c | 12 +++++-------
>   1 file changed, 5 insertions(+), 7 deletions(-)
>

Tested-by: Gurucharan <gurucharanx.g@intel.com> (A Contingent worker at Intel)



^ permalink raw reply	[flat|nested] 7+ messages in thread

end of thread, other threads:[~2022-06-14 14:59 UTC | newest]

Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-11 12:28 [PATCH 1/2] igb: Remove duplicate defines Kai-Heng Feng
2022-05-11 12:28 ` [PATCH 2/2] igb: Make DMA faster when CPU is active on the PCIe link Kai-Heng Feng
2022-05-11 12:49   ` [Intel-wired-lan] " Paul Menzel
2022-05-12  2:55     ` Kai-Heng Feng
2022-05-20  2:45       ` Kai-Heng Feng
2022-05-25  8:12         ` Palczewski, Mateusz
2022-06-14 14:58           ` G, GurucharanX

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