Re: [PATCH bpf-next] samples/bpf: add BPF_ATOMIC_OP macro for BPF samples

[Brendan Jackman <jackmanb@google.com>]

I actually deliberately skipped this file, thinking that people were
unlikely to want to add assembly-based atomics code under samples/

I guess it's nice for people to be able to e.g. move/copy code from
the selftests.

On Mon, 18 Jan 2021 at 10:18, Björn Töpel <bjorn.topel@gmail.com> wrote:
>
> From: Björn Töpel <bjorn.topel@intel.com>
>
> Brendan Jackman added extend atomic operations to the BPF instruction
> set in commit 7064a7341a0d ("Merge branch 'Atomics for eBPF'"), which
> introduces the BPF_ATOMIC_OP macro. However, that macro was missing
> for the BPF samples. Fix that by adding it into bpf_insn.h.
>
> Signed-off-by: Björn Töpel <bjorn.topel@intel.com>

Reviewed-by: Brendan Jackman <jackmanb@google.com>

> ---
>  samples/bpf/bpf_insn.h | 24 ++++++++++++++++++++----
>  1 file changed, 20 insertions(+), 4 deletions(-)
>
> diff --git a/samples/bpf/bpf_insn.h b/samples/bpf/bpf_insn.h
> index db67a2847395..aee04534483a 100644
> --- a/samples/bpf/bpf_insn.h
> +++ b/samples/bpf/bpf_insn.h
> @@ -134,15 +134,31 @@ struct bpf_insn;
>                 .off   = OFF,                                   \
>                 .imm   = 0 })
>
> -/* Atomic memory add, *(uint *)(dst_reg + off16) += src_reg */
> -
> -#define BPF_STX_XADD(SIZE, DST, SRC, OFF)                      \
> +/*
> + * Atomic operations:
> + *
> + *   BPF_ADD                  *(uint *) (dst_reg + off16) += src_reg
> + *   BPF_AND                  *(uint *) (dst_reg + off16) &= src_reg
> + *   BPF_OR                   *(uint *) (dst_reg + off16) |= src_reg
> + *   BPF_XOR                  *(uint *) (dst_reg + off16) ^= src_reg
> + *   BPF_ADD | BPF_FETCH      src_reg = atomic_fetch_add(dst_reg + off16, src_reg);
> + *   BPF_AND | BPF_FETCH      src_reg = atomic_fetch_and(dst_reg + off16, src_reg);
> + *   BPF_OR | BPF_FETCH       src_reg = atomic_fetch_or(dst_reg + off16, src_reg);
> + *   BPF_XOR | BPF_FETCH      src_reg = atomic_fetch_xor(dst_reg + off16, src_reg);
> + *   BPF_XCHG                 src_reg = atomic_xchg(dst_reg + off16, src_reg)
> + *   BPF_CMPXCHG              r0 = atomic_cmpxchg(dst_reg + off16, r0, src_reg)
> + */
> +
> +#define BPF_ATOMIC_OP(SIZE, OP, DST, SRC, OFF)                 \
>         ((struct bpf_insn) {                                    \
>                 .code  = BPF_STX | BPF_SIZE(SIZE) | BPF_ATOMIC, \
>                 .dst_reg = DST,                                 \
>                 .src_reg = SRC,                                 \
>                 .off   = OFF,                                   \
> -               .imm   = BPF_ADD })
> +               .imm   = OP })
> +
> +/* Legacy alias */
> +#define BPF_STX_XADD(SIZE, DST, SRC, OFF) BPF_ATOMIC_OP(SIZE, BPF_ADD, DST, SRC, OFF)
>
>  /* Memory store, *(uint *) (dst_reg + off16) = imm32 */
>
>
> base-commit: 232164e041e925a920bfd28e63d5233cfad90b73
> --
> 2.27.0
>