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[209.85.167.169]) by smtp.gmail.com with ESMTPSA id 63sm5449496oty.58.2019.11.04.12.56.30 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 04 Nov 2019 12:56:31 -0800 (PST) Received: by mail-oi1-f169.google.com with SMTP id l20so3370622oie.10; Mon, 04 Nov 2019 12:56:30 -0800 (PST) X-Received: by 2002:aca:ec89:: with SMTP id k131mr840013oih.154.1572900990777; Mon, 04 Nov 2019 12:56:30 -0800 (PST) MIME-Version: 1.0 References: <20191018125234.21825-1-linux@rasmusvillemoes.dk> <20191101124210.14510-1-linux@rasmusvillemoes.dk> <20191101124210.14510-36-linux@rasmusvillemoes.dk> <4e2ac670-2bf4-fb47-2130-c0120bcf0111@c-s.fr> <24ea27b6-adea-cc74-f480-b68de163f531@rasmusvillemoes.dk> In-Reply-To: <24ea27b6-adea-cc74-f480-b68de163f531@rasmusvillemoes.dk> From: Li Yang Date: Mon, 4 Nov 2019 14:56:19 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH v3 35/36] net/wan: make FSL_UCC_HDLC explicitly depend on PPC32 To: Rasmus Villemoes Cc: Christophe Leroy , Qiang Zhao , "linuxppc-dev@lists.ozlabs.org" , "linux-arm-kernel@lists.infradead.org" , "linux-kernel@vger.kernel.org" , Scott Wood , "netdev@vger.kernel.org" Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org On Mon, Nov 4, 2019 at 2:39 AM Rasmus Villemoes wrote: > > On 01/11/2019 23.31, Leo Li wrote: > > > > > >> -----Original Message----- > >> From: Christophe Leroy > >> Sent: Friday, November 1, 2019 11:30 AM > >> To: Rasmus Villemoes ; Qiang Zhao > >> ; Leo Li > >> Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-kernel@lists.infradead.org; > >> linux-kernel@vger.kernel.org; Scott Wood ; > >> netdev@vger.kernel.org > >> Subject: Re: [PATCH v3 35/36] net/wan: make FSL_UCC_HDLC explicitly > >> depend on PPC32 > >> > >> > >> > >> Le 01/11/2019 à 13:42, Rasmus Villemoes a écrit : > >>> Currently, FSL_UCC_HDLC depends on QUICC_ENGINE, which in turn > >> depends > >>> on PPC32. As preparation for removing the latter and thus allowing the > >>> core QE code to be built for other architectures, make FSL_UCC_HDLC > >>> explicitly depend on PPC32. > >> > >> Is that really powerpc specific ? Can't the ARM QE perform HDLC on UCC ? > > I think the driver would build on ARM. Whether it works I don't know. I > know it does not build on 64 bit hosts (see kbuild report for v2,23/23). The problem for arm64 can be easy to fix. Actually I don't think it is neccessarily to be compiled on all architectures except powerpc, arm and arm64. I am surprised that you made the core QE code compile for all architecture(although still have some kbuild warnings) > > > No. Actually the HDLC and TDM are the major reason to integrate a QE on the ARM based Layerscape SoCs. > > [citation needed]. I got this message from our marketing team. Also it is reflected on marketing materials like https://www.nxp.com/products/processors-and-microcontrollers/arm-processors/layerscape-communication-process/qoriq-layerscape-1043a-and-1023a-multicore-communications-processors:LS1043A "The QorIQ LS1043A ... integrated QUICC Engine® for legacy glue-less HDLC, TDM or Profibus support." > > > Since Rasmus doesn't have the hardware to test this feature Qiang Zhao probably can help verify the functionality of TDM and we can drop this patch. > > No, this patch cannot be dropped. Please see the kbuild complaints for > v2,23/23 about use of IS_ERR_VALUE on not-sizeof(long) entities. I see > kbuild has complained about the same thing for v3 since apparently the > same thing appears in ucc_slow.c. So I'll fix that. When I made this comment I didn't notice you have removed all the architectural dependencies for CONFIG_QUICC_ENGINE. If the QUICC_ENGINE is only buidable on powerpc, arm and arm64, this change will not be needed. BTW, I'm not sure if it is a good idea to make it selectable on these unrelavent architectures. Real architectural dependencies and COMPILE_TEST dependency will be better if we really want to test the buildability on other platforms. Regards, Leo