From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F1B7C10F00 for ; Sat, 9 Mar 2019 12:09:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 47605207E0 for ; Sat, 9 Mar 2019 12:09:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726393AbfCIMJ0 (ORCPT ); Sat, 9 Mar 2019 07:09:26 -0500 Received: from mail-oi1-f193.google.com ([209.85.167.193]:38899 "EHLO mail-oi1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725841AbfCIMJZ (ORCPT ); Sat, 9 Mar 2019 07:09:25 -0500 Received: by mail-oi1-f193.google.com with SMTP id q81so210953oic.5; Sat, 09 Mar 2019 04:09:24 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=c7UpAUyQQ18vNNBqU8jOL9yVqrFx8Exq2BEdIWvuxA4=; b=ABOPtUWZeyYm6R71LAad0jKXvKrR3JZPIVBi3D0le4O0SRAHHip9IPySdMS385hx/d RZAuqfFCwLoCInyan/bK7yrOnigmqAG4BNi0bMHlcHWUCDmAQFECvz+vnjCX8krtWFok bPyqZKqRQFlVszvmMnmBBlxLlcaUgcNSlopvjbEjuBe+zH0yM+4DNXaxOnsJANJw2Xba /5kNAUGY3J7FBNgotoDJgGidCYmn4XsYEwDXnK5YVW73t1UhxH773SieY13wwwuo7nNS n90vtvpReWZudL6W6uPqgtq8JHa5mhHKsz1rucEaiZmzFRNvEDvmrZJGBP30pEZMjM0m qHKA== X-Gm-Message-State: APjAAAUEHNcOxbNmSa8iCyoUOdrt/XSLjVPgMeJkUx4BP96X6qhGSRSH 2f3tMo+J5eKWRwEZkBhVytJqLmCYL8g49O+RMdU= X-Google-Smtp-Source: APXvYqyNknI9lW3mXn/MS2NJlwUpPkzxzTu6OQl/NYk/6LydYX6nFrKXDzu2qW2A/3+0ChwHPMORCPtiuBsEBFYmtKY= X-Received: by 2002:aca:d6cc:: with SMTP id n195mr11369266oig.27.1552133363787; Sat, 09 Mar 2019 04:09:23 -0800 (PST) MIME-Version: 1.0 References: <20190215163220.20041-1-paul.kocialkowski@bootlin.com> <387ed483-b205-beda-319d-6f2b8ea55601@gmail.com> <38f6708476e9beca4583ccc2a62e238a4981b735.camel@bootlin.com> <958bb823-3dc8-607f-3c38-3d902acb85a8@gmail.com> <20190219172515.GC13075@lunn.ch> <9cb2f7a8-a8cf-ef80-d260-cc67c072b5c5@xilinx.com> <8bb813fb-102b-00c9-fb6f-a3e928965051@xilinx.com> In-Reply-To: From: Harini Katakam Date: Sat, 9 Mar 2019 17:39:12 +0530 Message-ID: Subject: Re: [PATCH RESEND net] net: phy: xgmiitorgmii: Support generic PHY status read To: Michal Simek Cc: Paul Kocialkowski , Andrew Lunn , Florian Fainelli , netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, "David S . Miller" , Thomas Petazzoni , Heiner Kallweit Content-Type: text/plain; charset="UTF-8" Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Hi Andrew, On Thu, Feb 28, 2019 at 1:03 PM Harini Katakam wrote: > > Hi, > On Wed, Feb 27, 2019 at 2:35 PM Harini Katakam wrote: > > > > Hi Andrew, Paul, > > > > On Wed, Feb 27, 2019 at 2:15 PM Michal Simek wrote: > > > > > > On 21. 02. 19 12:03, Michal Simek wrote: > > > > On 21. 02. 19 11:24, Paul Kocialkowski wrote: > > > >> Hi, > > > >> > > > >> On Wed, 2019-02-20 at 07:58 +0100, Michal Simek wrote: > > > >>> Hi, > > > >>> > > > >>> On 19. 02. 19 18:25, Andrew Lunn wrote: > > > > >> Understood. I think we need to start a discussion about how the general > > > >> design of this driver can be improved. > > > >> > > > >> In particular, I wonder if it could work better to make this driver a > > > >> PHY driver that just redirects all its ops to the actual PHY driver, > > > >> except for read_status where it should also add some code. > > > > Thanks, I'm looking into this option and also a way to expose the correct > > interface mode setting as you mentioned below. I'll get back before the > > end of the week. Please do let me know if you have any further suggestions. > > > This IP does not have a PHY identifier or status register that can be accessed > from the phy framework. We could discuss with our design team to add these > in the future. But that would take sometime and this version should be still be > supported. Also, if this IP has a PHY driver, then two phy drivers would have > to be probed which are connected in a serial manner and I believe I'll have to > update the framework to support that. Could you please let me know if you have > any inputs on this? > OR since this is just a bridge IP, is it acceptable to address the error cases? > -> Module loading/unloading > -> Spinlocks for protection > -> Correct phy mode information to the driver. > -> Any other concerns > I could do a respin of this patch after addressing Andrew's comments: > https://patchwork.kernel.org/patch/9290231/ Related to this, I have a query on how the DT node for gmii2rgmii should look. One of the users of gmii2rgmii is Cadence macb driver. In Xilinx tree, we use this piece of code to register this mdiobus: + mdio_np = of_get_child_by_name(np, "mdio"); + if (mdio_np) { + of_node_put(mdio_np); + err = of_mdiobus_register(bp->mii_bus, mdio_np); + if (err) + goto err_out_unregister_bus; And the DT node looks like this: ethernet { phy-mode = "gmii"; phy-handle = <&extphy>; mdio { extphy { reg = ; }; gmii_to_rgmii{ compatible = "xlnx,gmii-to-rgmii-1.0"; phy-handle = <&extphy>; reg = ; }; }; }; Could you please clarify if phy-handle in ethernet should point to external PHY or gmii2rgmii? Regards, Harini