From: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Po Liu <po.liu@nxp.com>, Claudiu Manoil <claudiu.manoil@nxp.com>,
Alexandru Marginean <alexandru.marginean@nxp.com>,
Vladimir Oltean <vladimir.oltean@nxp.com>,
Leo Li <leoyang.li@nxp.com>, Mingkai Hu <mingkai.hu@nxp.com>,
Andrew Lunn <andrew@lunn.ch>,
Florian Fainelli <f.fainelli@gmail.com>,
Vivien Didelot <vivien.didelot@gmail.com>,
"David S. Miller" <davem@davemloft.net>,
Jiri Pirko <jiri@resnulli.us>, Ido Schimmel <idosch@idosch.org>,
Jakub Kicinski <kuba@kernel.org>, netdev <netdev@vger.kernel.org>,
lkml <linux-kernel@vger.kernel.org>,
Horatiu Vultur <horatiu.vultur@microchip.com>,
Alexandre Belloni <alexandre.belloni@bootlin.com>,
"Allan W. Nielsen" <allan.nielsen@microchip.com>,
Joergen Andreasen <joergen.andreasen@microchip.com>,
Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>,
Vinicius Costa Gomes <vinicius.gomes@intel.com>,
Nikolay Aleksandrov <nikolay@cumulusnetworks.com>,
Roopa Prabhu <roopa@cumulusnetworks.com>,
"linux-devel@linux.nxdi.nxp.com" <linux-devel@linux.nxdi.nxp.com>
Subject: RE: [EXT] Re: [PATCH v1 net-next 1/3] net: dsa: felix: qos classified based on pcp
Date: Tue, 12 May 2020 06:21:42 +0000 [thread overview]
Message-ID: <DB8PR04MB5785440D5F8A8AA3EB941A15F0BE0@DB8PR04MB5785.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <CA+h21hpennftjgTr_CK85drFUErQUqZkcFA+zPe0L25VAbe=FA@mail.gmail.com>
Hi Vladimir,
On Mon, 11 May 2020 at 08:19, Vladimir Oltean <vladimir.oltean@nxp.com> wrote:
>
> The new skbedit priority offload action looks interesting to me.
> But it also raises the question of what to do in the default case where such rules are not installed. I think it is ok to support a
> 1-to-1 VLAN PCP to TC mapping by default? This should also be needed for features such as Priority Flow Control.
skbedit priority offload seems only support port based prority set now, I haven't found how to set a priority for each port and QoS. So I set a 1-to-1 VLAN PCP to TC mapping by default.
> Xiaoliang, just a small comment in case you need to resend.
> The felix->info structure is intended to hold SoC-specific data that
> is likely to differ between chips (like for example if vsc7511 support
> ever appears in felix). But I see ANA:PORT:QOS_CFG and
> ANA:PORT:QOS_PCP_DEI_MAP_CFG are common registers, so are there any
> specific reasons why you put this in felix_vsc9959 and not in the
> common ocelot code?
All right, I have checked they are common registers, I will move port_qos_map_init() function to felix.c.
> > + for (i = 0; i < FELIX_NUM_TC * 2; i++) {
> > + ocelot_rmw_ix(ocelot,
> > + (ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL &
> > + i) |
> > + ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL(i),
> > + ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL |
> > + ANA_PORT_PCP_DEI_MAP_QOS_PCP_DEI_VAL_M,
> > + ANA_PORT_PCP_DEI_MAP,
> > + port, i);
>
> ANA_PORT_PCP_DEI_MAP_DP_PCP_DEI_VAL is 1 bit. Are you sure this should be % i and not % 2?
Because in QOS_PCP_DEI_MAP_CFG register, BIT(3) is DP value, BIT(2, 0) is QOS value. QoS class=QOS_PCP_DEI_MAP_CFG[i].QOS_PC
P_DEI_VAL, i=8*DEI + PCP, so DP value need to be set BIT(3)&i.
Regards,
Xiaoliang Yang
next prev parent reply other threads:[~2020-05-12 6:21 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-11 5:43 [PATCH v1 net-next 0/3] net: dsa: felix: tc taprio and CBS offload support Xiaoliang Yang
2020-05-11 5:43 ` [PATCH v1 net-next 1/3] net: dsa: felix: qos classified based on pcp Xiaoliang Yang
2020-05-11 8:19 ` Vladimir Oltean
2020-05-12 6:21 ` Xiaoliang Yang [this message]
2020-05-11 5:43 ` [PATCH v1 net-next 2/3] net: dsa: felix: Configure Time-Aware Scheduler via taprio offload Xiaoliang Yang
2020-05-11 23:52 ` David Miller
2020-05-12 0:10 ` Vladimir Oltean
2020-05-11 5:43 ` [PATCH v1 net-next 3/3] net: dsa: felix: add support Credit Based Shaper(CBS) for hardware offload Xiaoliang Yang
2020-05-11 22:34 ` Jakub Kicinski
2020-05-12 6:27 ` [EXT] " Xiaoliang Yang
2020-05-12 1:41 ` Vinicius Costa Gomes
2020-05-12 9:17 ` [EXT] " Xiaoliang Yang
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