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From: Joakim Zhang <qiangqing.zhang@nxp.com>
To: Marc Kleine-Budde <mkl@pengutronix.de>,
	"linux-can@vger.kernel.org" <linux-can@vger.kernel.org>
Cc: dl-linux-imx <linux-imx@nxp.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>
Subject: RE: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function
Date: Mon, 28 Sep 2020 05:23:26 +0000	[thread overview]
Message-ID: <DB8PR04MB67953242A9B727F851B7466CE6350@DB8PR04MB6795.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <DB8PR04MB6795C350DB0CCFF56787561CE6350@DB8PR04MB6795.eurprd04.prod.outlook.com>


> -----Original Message-----
> From: Joakim Zhang <qiangqing.zhang@nxp.com>
> Sent: 2020年9月28日 10:29
> To: Marc Kleine-Budde <mkl@pengutronix.de>; linux-can@vger.kernel.org
> Cc: dl-linux-imx <linux-imx@nxp.com>; netdev@vger.kernel.org
> Subject: RE: [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC
> function
> 
> 
> > -----Original Message-----
> > From: Marc Kleine-Budde <mkl@pengutronix.de>
> > Sent: 2020年9月28日 3:58
> > To: Joakim Zhang <qiangqing.zhang@nxp.com>; linux-can@vger.kernel.org
> > Cc: dl-linux-imx <linux-imx@nxp.com>; netdev@vger.kernel.org
> > Subject: Re: [PATCH V2 1/3] can: flexcan: initialize all flexcan
> > memory for ECC function
> >
> > On 9/27/20 6:07 PM, Joakim Zhang wrote:
> > [...]
> >
> > > +static void flexcan_init_ram(struct net_device *dev) {
> > > +	struct flexcan_priv *priv = netdev_priv(dev);
> > > +	struct flexcan_regs __iomem *regs = priv->regs;
> > > +	u32 reg_ctrl2;
> > > +	int i;
> > > +
> > > +	/* 11.8.3.13 Detection and correction of memory errors:
> > > +	 * CTRL2[WRMFRZ] grants write access to all memory positions that
> > > +	 * require initialization, ranging from 0x080 to 0xADF and
> > > +	 * from 0xF28 to 0xFFF when the CAN FD feature is enabled.
> > > +	 * The RXMGMASK, RX14MASK, RX15MASK, and RXFGMASK
> registers
> > need to
> > > +	 * be initialized as well. MCR[RFEN] must not be set during memory
> > > +	 * initialization.
> > > +	 */
> > > +	reg_ctrl2 = priv->read(&regs->ctrl2);
> > > +	reg_ctrl2 |= FLEXCAN_CTRL2_WRMFRZ;
> > > +	priv->write(reg_ctrl2, &regs->ctrl2);
> > > +
> > > +	for (i = 0; i < ram_init[0].len; i++)
> > > +		priv->write(0, (void __iomem *)regs + ram_init[0].offset +
> > > +sizeof(u32) * i);
> >
> > As the write function only does endian conversion, and you're writing 0 here.
> > What about using iowrite32_rep() and get rid of the for loop?
> 
> Thanks for this point, I will update in next version.

Ahhh.. I check iowrite32_rep() writes a buf to single address, no shift for address.

I prefer to use memset_io() here to initialize a block of io memory. What do you think?

Best Regards,
Joakim Zhang
> Best Regards,
> Joakim Zhang
> > Marc
> >
> > --
> > Pengutronix e.K.                 | Marc Kleine-Budde           |
> > Embedded Linux                   | https://www.pengutronix.de  |
> > Vertretung West/Dortmund         | Phone: +49-231-2826-924     |
> > Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-5555 |


  reply	other threads:[~2020-09-28  5:23 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-27 16:07 [PATCH V2 0/3] patch set for flexcan Joakim Zhang
2020-09-27 16:07 ` [PATCH V2 1/3] can: flexcan: initialize all flexcan memory for ECC function Joakim Zhang
2020-09-27 19:51   ` Marc Kleine-Budde
2020-09-28  2:00     ` Joakim Zhang
2020-09-27 19:57   ` Marc Kleine-Budde
2020-09-28  2:29     ` Joakim Zhang
2020-09-28  5:23       ` Joakim Zhang [this message]
2020-09-28  6:20         ` Marc Kleine-Budde
2020-09-27 16:08 ` [PATCH V2 2/3] can: flexcan: add flexcan driver for i.MX8MP Joakim Zhang
2020-09-27 16:08 ` [PATCH V2 3/3] can: flexcan: disable runtime PM if register flexcandev failed Joakim Zhang

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