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From: Parshuram Raju Thombare <pthombar@cadence.com>
To: Russell King - ARM Linux admin <linux@armlinux.org.uk>
Cc: "andrew@lunn.ch" <andrew@lunn.ch>,
	"nicolas.ferre@microchip.com" <nicolas.ferre@microchip.com>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"f.fainelli@gmail.com" <f.fainelli@gmail.com>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"hkallweit1@gmail.com" <hkallweit1@gmail.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Rafal Ciepiela <rafalc@cadence.com>,
	Anil Joy Varughese <aniljoy@cadence.com>,
	Piotr Sroka <piotrs@cadence.com>
Subject: RE: [PATCH v5 4/5] net: macb: add support for high speed interface
Date: Tue, 25 Jun 2019 09:29:03 +0000	[thread overview]
Message-ID: <SN2PR07MB2480AE208D1C5A3D6AB7E16EC1E30@SN2PR07MB2480.namprd07.prod.outlook.com> (raw)
In-Reply-To: <20190625090324.c6tq2neksatfwljw@shell.armlinux.org.uk>

>> >>  	switch (state->interface) {
>> >>  	case PHY_INTERFACE_MODE_NA:
>> >> +	case PHY_INTERFACE_MODE_USXGMII:
>> >> +	case PHY_INTERFACE_MODE_10GKR:
>> >> +		if (bp->caps & MACB_CAPS_GIGABIT_MODE_AVAILABLE) {
>> >> +			phylink_set(mask, 10000baseCR_Full);
>> >> +			phylink_set(mask, 10000baseER_Full);
>> >> +			phylink_set(mask, 10000baseKR_Full);
>> >> +			phylink_set(mask, 10000baseLR_Full);
>> >> +			phylink_set(mask, 10000baseLRM_Full);
>> >> +			phylink_set(mask, 10000baseSR_Full);
>> >> +			phylink_set(mask, 10000baseT_Full);
>> >> +			phylink_set(mask, 5000baseT_Full);
>> >> +			phylink_set(mask, 2500baseX_Full);
>> >> +			phylink_set(mask, 1000baseX_Full);
>> >> +		}
>> >If MACB_CAPS_GIGABIT_MODE_AVAILABLE is not set, are these interface
>> >modes supported by the hardware?  If the PHY interface mode is not
>> >supported, then the returned support mask must be cleared.[]
>> There are some configs which uses this macro to limit data rate to 100M
>> even if hardware support higher rates.
>I'm sorry, this response does not address my statement, maybe I wasn't
>clear enough.  I am asking about the *PHY* interface modes, in
>other words (e.g.) PHY_INTERFACE_MODE_USXGMII.

If interface is not supported by hardware probe returns with error, so net 
device is not registered at all.

Regards,
Parshuram Thombare

  reply	other threads:[~2019-06-25  9:29 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-24 12:10 [PATCH v5 0/5] net: macb: cover letter Parshuram Thombare
2019-06-24 12:10 ` [PATCH v5 1/5] net: macb: add phylink support Parshuram Thombare
2019-06-24 12:11 ` [PATCH v5 2/5] net: macb: add support for sgmii MAC-PHY interface Parshuram Thombare
2019-06-24 13:42   ` Russell King - ARM Linux admin
2019-06-25  9:26     ` Parshuram Raju Thombare
2019-06-25  9:29       ` Russell King - ARM Linux admin
2019-06-25  9:38         ` Parshuram Raju Thombare
2019-06-25 10:34           ` Russell King - ARM Linux admin
2019-06-25 11:22             ` Parshuram Raju Thombare
2019-06-24 12:11 ` [PATCH v5 3/5] net: macb: add support for c45 PHY Parshuram Thombare
2019-06-24 12:12 ` [PATCH v5 4/5] net: macb: add support for high speed interface Parshuram Thombare
2019-06-24 13:47   ` Russell King - ARM Linux admin
2019-06-25  8:49     ` Parshuram Raju Thombare
2019-06-25  9:03       ` Russell King - ARM Linux admin
2019-06-25  9:29         ` Parshuram Raju Thombare [this message]
2019-06-25  8:55     ` Parshuram Raju Thombare
2019-06-24 12:12 ` [PATCH v5 5/5] net: macb: parameter added to cadence ethernet controller DT binding Parshuram Thombare

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