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From: Jiri Pirko <jiri@resnulli.us>
To: Vadim Fedorenko <vfedorenko@novek.ru>
Cc: Jakub Kicinski <kuba@kernel.org>,
	Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,
	netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-clk@vger.kernel.org, Vadim Fedorenko <vadfed@fb.com>
Subject: Re: [RFC PATCH v3 1/6] dpll: Add DPLL framework base functions
Date: Wed, 12 Oct 2022 12:47:22 +0200	[thread overview]
Message-ID: <Y0abOsYjGapUTJHv@nanopsycho> (raw)
In-Reply-To: <20221010011804.23716-2-vfedorenko@novek.ru>

Mon, Oct 10, 2022 at 03:17:59AM CEST, vfedorenko@novek.ru wrote:
>From: Vadim Fedorenko <vadfed@fb.com>
>
>DPLL framework is used to represent and configure DPLL devices
>in systems. Each device that has DPLL and can configure sources
>and outputs can use this framework.
>
>Signed-off-by: Vadim Fedorenko <vadfed@fb.com>
>Co-developed-by: Jakub Kicinski <kuba@kernel.org>
>Co-developed-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>


[...]


>+struct dpll_device *dpll_device_alloc(struct dpll_device_ops *ops, const char *name,
>+				      int sources_count, int outputs_count, void *priv)

Having constant array of "pins" would not work for SyncE. For example in
mlxsw driver, netdevs can appear and disappear within the device
lifetime (for example port splits, linecard provision). We need to
register/unregister pins dynamically.

[...]


  parent reply	other threads:[~2022-10-12 10:47 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-10  1:17 [RFC PATCH v3 0/5] Create common DPLL/clock configuration API Vadim Fedorenko
2022-10-10  1:17 ` [RFC PATCH v3 1/6] dpll: Add DPLL framework base functions Vadim Fedorenko
2022-10-10  9:18   ` Jiri Pirko
2022-10-10 19:54     ` Vadim Fedorenko
2022-10-11  8:32       ` Jiri Pirko
2022-10-11  8:47         ` Jiri Pirko
2022-10-11 21:31           ` Vadim Fedorenko
2022-10-12  6:44             ` Jiri Pirko
2022-10-12 20:12               ` Vadim Fedorenko
2022-10-13  6:55                 ` Jiri Pirko
2022-10-13 15:17                   ` Jakub Kicinski
2022-10-14  9:52                     ` Jiri Pirko
2022-10-11 21:23         ` Vadim Fedorenko
2022-10-12 10:44           ` Jiri Pirko
2022-10-12 10:47   ` Jiri Pirko [this message]
2022-10-12 20:15     ` Vadim Fedorenko
2022-10-13  6:56       ` Jiri Pirko
2022-10-12 16:51   ` Jiri Pirko
2022-10-12 20:17     ` Vadim Fedorenko
2022-10-10  1:18 ` [RFC PATCH v3 2/6] dpll: add netlink events Vadim Fedorenko
2022-10-10  1:18 ` [RFC PATCH v3 3/6] dpll: add support for source selection modes Vadim Fedorenko
2022-10-10 14:13   ` Jiri Pirko
2022-10-10 20:03     ` Vadim Fedorenko
2022-10-10  1:18 ` [RFC PATCH v3 4/6] dpll: get source/output name Vadim Fedorenko
2022-10-10  9:45   ` Jiri Pirko
2022-10-10 19:55     ` Vadim Fedorenko
2022-10-11  7:28       ` Jiri Pirko
2022-10-10  1:18 ` [RFC PATCH v3 5/6] dpll: documentation on DPLL subsystem interface Vadim Fedorenko
2022-10-10  1:18 ` [RFC PATCH v3 6/6] ptp_ocp: implement DPLL ops Vadim Fedorenko
2022-10-10 15:42   ` Jiri Pirko
2022-10-10 20:14     ` Vadim Fedorenko
2022-10-11  7:30       ` Jiri Pirko
2022-10-12 15:14   ` Jiri Pirko

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