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From: Andrew Lunn <andrew@lunn.ch>
To: "Wells Lu 呂芳騰" <wells.lu@sunplus.com>
Cc: Wells Lu <wellslutw@gmail.com>,
	"davem@davemloft.net" <davem@davemloft.net>,
	"kuba@kernel.org" <kuba@kernel.org>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	"netdev@vger.kernel.org" <netdev@vger.kernel.org>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"p.zabel@pengutronix.de" <p.zabel@pengutronix.de>
Subject: Re: [PATCH 2/2] net: ethernet: Add driver for Sunplus SP7021
Date: Mon, 8 Nov 2021 18:32:52 +0100	[thread overview]
Message-ID: <YYlfRB7updHplnLE@lunn.ch> (raw)
In-Reply-To: <585e234fdb74499caafee3b43b5e5ab4@sphcmbx02.sunplus.com.tw>

On Mon, Nov 08, 2021 at 04:47:34PM +0000, Wells Lu 呂芳騰 wrote:
> > > The switch will not recognize type of packets, regardless BPDU, PTP or
> > > any other packets. If turning off source-address learning function, it
> > > works like an Ethernet plus a 2-port hub.
> > 
> > So without STP, there is no way to stop an loop, and a broadcast storm taking
> > down your network?
> 
> Do you mean connecting two PHY ports to the same LAN? We never 
> connect two PHY ports to the same LAN (or hub). I never think of this 
> loop problem. I thought only WAN has the loop problem.

Any Ethernet network can have a loop. Often loops a deliberate because
they give redundancy. STP will detect this loop, and somewhere in the
network one of the switches will block traffic to break the loop. But
if something in the network breaks, the port can be unblocked to allow
traffic to flow, redundancy. Well behaved switches should always
implement STP.

> How an Ethernet hub take care of this situation?

STP. Run tcpdump on your network. Depending on how your network is
configured, you might see BPDU from your building switches.

> Is that reasonable to connect two ports of an Ethernet hub together?

It is not just together. You cannot guarantee any Ethernet network is
a tree. You could connect the two ports to two different hubs, but
those hubs are connected together, and so you get a loop.

> > Looking at the TX descriptor, there are two bits:
> > 
> >           [18]: force forward to port 0
> >           [19]: force forward to port 1
> > 
> > When the switch is enabled, can these two bits be used?
> 
> Yes, for example, when bit 19 of TX descriptor is enabled, a packet from CPU 
> port is forwarded to LAN port 0 forcibly.
> 
> 
> > In the RX descriptor there is:
> > 
> > pkt_sp:
> >           000: from port0
> >           001: from port1
> >           110: soc0 loopback
> >           101: soc1 loopback
> > 
> > Are these bits used when the switch is enabled?
> 
> Yes, E- MAC driver uses these bits to tell where a packet comes from.
> Note that soc1 port (CPU port) has been removed in this chip.
 
Right. So you can have two netdev when in L2 switch mode.

You need to think about the Linux model some more. In linux,
networking hardware is there to accelerate what the Linux stack can do
in software. Take for example a simple SoC will have two Ethernet
interfaces. You can perform software bridging on those two interfaces:

ip link add name br0 type bridge
ip link set dev br0 up
ip link set dev eth0 master br0
ip link set dev eth1 master br0

The software bridge will decided which interface to send a packet
out. The software will perform learning etc.

You can use your dual MAC setup exactly like this. But you can also go
further. You can use the hardware to accelerate switching packets
between eth0 and eth1. But also Linux can still send packets out
specific ports using these bits. The software bridge and the hardware
bridge work together. This is the correct way to do this in Linux.

> Sorry, I don't know what is a RMC packet?

Sorry, i have no idea.

       Andrew

  reply	other threads:[~2021-11-08 17:33 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-03 11:02 [PATCH 0/2] This is a patch series of ethernet driver for Sunplus SP7021 SoC Wells Lu
2021-11-03 11:02 ` [PATCH 1/2] devicetree: bindings: net: Add bindings doc for Sunplus SP7021 Wells Lu
2021-11-03 11:02 ` [PATCH 2/2] net: ethernet: Add driver " Wells Lu
2021-11-03 12:05   ` Denis Kirjanov
2021-11-03 14:08     ` Wells Lu 呂芳騰
2021-11-03 12:10   ` Philipp Zabel
2021-11-03 15:11     ` Wells Lu 呂芳騰
2021-11-03 15:52   ` Randy Dunlap
2021-11-03 18:08     ` Wells Lu 呂芳騰
2021-11-03 19:30       ` Andrew Lunn
2021-11-04  5:31         ` Wells Lu 呂芳騰
2021-11-04 12:59           ` Andrew Lunn
2021-11-04 14:55             ` Randy Dunlap
2021-11-04 17:51               ` Wells Lu 呂芳騰
2021-11-04 17:46             ` Wells Lu 呂芳騰
2021-11-04 18:21               ` Andrew Lunn
2021-11-04 19:03                 ` Wells Lu 呂芳騰
2021-11-03 20:26       ` Randy Dunlap
2021-11-03 16:51   ` Andrew Lunn
2021-11-05 11:25     ` Wells Lu 呂芳騰
2021-11-05 13:37       ` Andrew Lunn
2021-11-08  9:37         ` Wells Lu 呂芳騰
2021-11-08 13:15           ` Andrew Lunn
2021-11-08 14:26             ` Wells Lu 呂芳騰
2021-11-08 14:52               ` Andrew Lunn
2021-11-08 16:47                 ` Wells Lu 呂芳騰
2021-11-08 17:32                   ` Andrew Lunn [this message]
2021-11-09 14:39                     ` Wells Lu 呂芳騰
2021-11-09 15:32                       ` Andrew Lunn
2021-11-09 17:05                         ` Wells Lu 呂芳騰
2021-11-14 19:19   ` Pavel Skripkin
2021-11-17  9:28     ` Wells Lu 呂芳騰
2021-11-03 11:27 ` [PATCH 0/2] This is a patch series of ethernet driver for Sunplus SP7021 SoC Denis Kirjanov
2021-11-11  9:04 ` [PATCH v2 0/2] This is a patch series for pinctrl " Wells Lu
2021-11-11  9:04   ` [PATCH v2 1/2] devicetree: bindings: net: Add bindings doc for Sunplus SP7021 Wells Lu
2021-11-11 14:57     ` Rob Herring
2021-11-12  2:57       ` Wells Lu 呂芳騰
2021-11-11 18:23     ` Andrew Lunn
2021-11-12  2:50       ` Wells Lu 呂芳騰
2021-11-11  9:04   ` [PATCH v2 2/2] net: ethernet: Add driver " Wells Lu
2021-11-11 11:31     ` Denis Kirjanov
2021-11-13 14:22       ` Wells Lu 呂芳騰
2021-11-13 15:34         ` Andrew Lunn
2021-11-18  8:15           ` Wells Lu 呂芳騰
2021-11-12 17:42     ` kernel test robot
2021-11-12 23:16     ` Florian Fainelli
2021-11-12 23:24       ` Andrew Lunn
2021-11-15 14:38         ` Wells Lu 呂芳騰
2021-11-14 18:59       ` Wells Lu 呂芳騰
2021-11-12 23:58     ` Andrew Lunn
2021-11-16 17:09       ` Wells Lu 呂芳騰
2021-11-16 22:15         ` Andrew Lunn
2021-11-18  8:22           ` Wells Lu 呂芳騰
2021-11-25 11:28       ` Wells Lu 呂芳騰
2021-11-25 15:20         ` Andrew Lunn
2021-11-26  3:56           ` Wells Lu 呂芳騰
2021-11-26 14:38             ` Andrew Lunn
2021-11-26 16:12               ` Wells Lu 呂芳騰
2021-11-26 18:07                 ` Andrew Lunn
2021-11-26 19:13                   ` Wells Lu 呂芳騰
2021-11-26 19:32                     ` Andrew Lunn
2021-11-29 11:16                       ` Wells Lu 呂芳騰

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