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From: Andrew Lunn <andrew@lunn.ch>
To: Michael Walle <michael@walle.cc>
Cc: Heiner Kallweit <hkallweit1@gmail.com>,
	Russell King <linux@armlinux.org.uk>,
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,
	"David S . Miller" <davem@davemloft.net>,
	Xu Liang <lxu@maxlinear.com>,
	Alexandre Belloni <alexandre.belloni@bootlin.com>,
	Florian Fainelli <f.fainelli@gmail.com>,
	netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH RFC net-next 4/5] net: phy: introduce is_c45_over_c22 flag
Date: Thu, 24 Mar 2022 19:55:28 +0100	[thread overview]
Message-ID: <Yjy+oCLdnu3FrNp+@lunn.ch> (raw)
In-Reply-To: <0d4a2654acd2cc56f7b17981bf14474e@walle.cc>

> The
> > only valid case i can think of is for a very oddball PHY which has C45
> > register space, but cannot actually do C45 transfers, and so C45 over
> > C22 is the only option.
> 
> And how would you know that the PHY has the needed registers in c22
> space? Or do we assume that every C45 PHY has these registers?

I think it is a reasonable assumption at the moment. We have around
170 MDIO bus masters in Linux. All but one can do C22. There are
around 15 which can do both C22 and C45, and only one that i know of
which is C45 only. So anybody making a C45 transfer only PHY is making
their device hard to sell.

I suppose a PHY integrated with the MAC could by C45 only, and not
support C22, but i've not seen such a device yet. My guess such a
device would be an Ethernet switch, or a USB device, or maybe an
automotive device with a T1 PHY.

       Andrew

  reply	other threads:[~2022-03-24 18:55 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-23 18:34 [PATCH RFC net-next 0/5] net: phy: C45-over-C22 access Michael Walle
2022-03-23 18:34 ` [PATCH RFC net-next 1/5] net: phy: mscc-miim: reject clause 45 register accesses Michael Walle
2022-03-23 19:27   ` Andrew Lunn
2022-03-23 20:14   ` Florian Fainelli
2022-03-23 18:34 ` [PATCH RFC net-next 2/5] net: phy: support indirect c45 access in get_phy_c45_ids() Michael Walle
2022-03-23 19:39   ` Andrew Lunn
2022-03-23 22:14     ` Michael Walle
2022-03-30 16:18       ` Russell King (Oracle)
2022-03-31  8:28         ` Michael Walle
2022-03-24 14:28     ` Michael Walle
2022-03-24 15:09       ` Andrew Lunn
2022-03-23 18:34 ` [PATCH RFC net-next 3/5] net: phy: mscc-miim: add probe_capabilities Michael Walle
2022-03-23 20:14   ` Florian Fainelli
2022-03-23 18:34 ` [PATCH RFC net-next 4/5] net: phy: introduce is_c45_over_c22 flag Michael Walle
2022-03-23 20:07   ` Andrew Lunn
2022-03-23 22:38     ` Michael Walle
2022-03-24  0:41       ` Andrew Lunn
2022-03-24 16:03         ` Michael Walle
2022-03-24 16:23           ` Andrew Lunn
2022-03-24 17:18             ` Michael Walle
2022-03-24 18:55               ` Andrew Lunn [this message]
2022-03-31 11:50                 ` Russell King (Oracle)
2022-03-31 12:06                   ` Andrew Lunn
2022-03-31 13:04                     ` Russell King (Oracle)
2022-03-31 11:44               ` Russell King (Oracle)
2022-03-31 11:31         ` Russell King (Oracle)
2022-03-23 18:34 ` [PATCH RFC net-next 5/5] net: phylink: handle the new is_c45_over_c22 property Michael Walle
2022-03-23 20:30 ` [PATCH RFC net-next 0/5] net: phy: C45-over-C22 access Andrew Lunn
2022-03-23 23:01   ` Michael Walle

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