From: Martyn Welch <martyn.welch@collabora.com>
To: Andrew Lunn <andrew@lunn.ch>
Cc: Vivien Didelot <vivien.didelot@gmail.com>,
Florian Fainelli <f.fainelli@gmail.com>,
Vladimir Oltean <olteanv@gmail.com>,
netdev@vger.kernel.org, kernel@collabora.com
Subject: mv88e6240 configuration broken for B850v3
Date: Fri, 03 Dec 2021 09:06:09 +0000 [thread overview]
Message-ID: <b98043f66e8c6f1fd75d11af7b28c55018c58d79.camel@collabora.com> (raw)
Hi Andrew,
I'm currently in the process of updating the GE B850v3 [1] to run a
newer kernel than the one it's currently running.
This device (and others in the same family) use a mv88e6240 switch to
provide a number of their ethernet ports. The CPU link on the switch is
connected via a PHY, as the network port on the SoM used is exposed via
a PHY.
The ports of the B850v3 stopped working when I upgraded, bisecting
resulted in me finding that this commit was the root cause:
3be98b2d5fbc (refs/bisect/bad) net: dsa: Down cpu/dsa ports phylink
will control
I think this is causing the PHY on the mv88e6240 side of the CPU link
to be forced down in our use case.
I assume an extra check is needed here to stop that in cases like ours,
though I'm not sure what at this point. Any ideas?
Thanks in advance,
Martyn
[1]:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/imx6q-b850v3.dts
next reply other threads:[~2021-12-03 9:06 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-03 9:06 Martyn Welch [this message]
2021-12-03 16:25 ` mv88e6240 configuration broken for B850v3 Andrew Lunn
2021-12-06 17:44 ` Martyn Welch
2021-12-06 18:26 ` Martyn Welch
2021-12-06 18:31 ` Vladimir Oltean
2021-12-06 18:37 ` Martyn Welch
2021-12-06 18:50 ` Vladimir Oltean
2021-12-06 19:24 ` Martyn Welch
2021-12-06 19:37 ` Vladimir Oltean
2021-12-06 19:53 ` Andrew Lunn
2021-12-06 20:01 ` Vladimir Oltean
2021-12-06 20:18 ` Russell King (Oracle)
2021-12-06 20:29 ` Vladimir Oltean
2021-12-07 14:09 ` Andrew Lunn
2021-12-06 21:44 ` Vladimir Oltean
2021-12-06 22:13 ` Russell King (Oracle)
2021-12-06 20:07 ` Russell King (Oracle)
2021-12-06 20:23 ` Vladimir Oltean
2021-12-06 20:51 ` Russell King (Oracle)
2021-12-06 21:13 ` Vladimir Oltean
2021-12-06 21:27 ` Russell King (Oracle)
2021-12-06 21:49 ` Russell King (Oracle)
2021-12-06 23:27 ` Vladimir Oltean
2021-12-07 0:58 ` Russell King (Oracle)
2021-12-07 13:24 ` Vladimir Oltean
2021-12-07 13:59 ` Russell King (Oracle)
2021-12-07 14:37 ` Vladimir Oltean
2021-12-07 14:53 ` Russell King (Oracle)
2021-12-06 21:51 ` Vladimir Oltean
2021-12-06 22:17 ` Andrew Lunn
2021-12-06 22:22 ` Russell King (Oracle)
2021-12-06 23:44 ` Vladimir Oltean
2021-12-07 2:06 ` Andrew Lunn
2021-12-07 12:48 ` Vladimir Oltean
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