From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6FFF8C5479D for ; Mon, 9 Jan 2023 17:01:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237133AbjAIRBG (ORCPT ); Mon, 9 Jan 2023 12:01:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54526 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237449AbjAIRAs (ORCPT ); Mon, 9 Jan 2023 12:00:48 -0500 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3717D120BB; Mon, 9 Jan 2023 09:00:43 -0800 (PST) Received: by mail-ej1-x62b.google.com with SMTP id fc4so21687215ejc.12; Mon, 09 Jan 2023 09:00:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:from:to:cc:subject:date:message-id:reply-to; bh=HR26W88exKhx8bFSGC/ZPulsbrTm+6JRW0kWpWFduEw=; b=WseLWr8OvbFhJJv9Gdd1ezUp9QyMnXk2IYYS5+S0fiv72EouLxLHxRSn1cHAukmUeH mnAm1eW/xmEWMZs3Tw5m3s60msrugm/tk4X7UKD99lJVBkstL/dOg5QRzut1d21CRQsQ z7k3LhwpMU9qybds+preYiFSl1GOki09uZVgbEvhgYJJXn0HZBGQxROxJ7M4DiqApsJQ hE0A2v0OJmFOrYTityY7SA7uzAi9jjM+U9xnJinRK1528gdeyXAIeUwYlTaEJ6u9MoQG oNSwHZUSYJsH2QO930GzTSN/Di3zmz0FjD98en/W6QZ0RsrFi/3TQy+Z5d44AJzdZi4n M4eQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=in-reply-to:content-disposition:mime-version:references:message-id :subject:cc:to:from:date:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=HR26W88exKhx8bFSGC/ZPulsbrTm+6JRW0kWpWFduEw=; b=zdrkMMxk8aRkO06i7y8lfgIL6P183rBYo+RFGF4svKyiqts8xaQERkUv8vjcy/v0h+ n/cQtc56MMZeHEywI3xK+7WDDNqxHDIicTaa5CuxgnnZ4xyYIzqp0+Tx2tEsrfVHRtd7 glZ/i/r4hIRvpvt57d7K0VHdpLj/lV/89zxN9pgLalaeYeELGgp2YG4NER0Itoafe1Sb Z8Hwa/3xi8pgRUfGlB3Qa5IVkAj44HtylHpmAQqL+/YI5I80jw6TEvH93IxciSgS7JPU eCRG913gqqGi+dvnXnT+ltGpxQ3Nwfpmha8z639Ogk47pESycLCxdhFPoMTDpXfz8EEX y5HQ== X-Gm-Message-State: AFqh2krmXEtwv8SDvMIoE7jYKyyt8lZWFmzTIsWCvCfJ8CVYU5XW1+7y x/guidquVKUwWkD/AWPJ61s= X-Google-Smtp-Source: AMrXdXthRv06UM2emB6vRAG+gngtmX7Qbg2sza5v4lJJGBmSRkLcccFjLj+JnPmWz8xA22GK9LQw+A== X-Received: by 2002:a17:907:6f18:b0:837:3ed3:9c2b with SMTP id sy24-20020a1709076f1800b008373ed39c2bmr62403014ejc.5.1673283641695; Mon, 09 Jan 2023 09:00:41 -0800 (PST) Received: from gvm01 ([91.199.164.40]) by smtp.gmail.com with ESMTPSA id w22-20020a1709061f1600b0081bfc79beaesm3942380ejj.75.2023.01.09.09.00.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 09 Jan 2023 09:00:41 -0800 (PST) Date: Mon, 9 Jan 2023 18:00:38 +0100 From: Piergiorgio Beruto To: Andrew Lunn , Heiner Kallweit , Russell King , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Oleksij Rempel , mailhol.vincent@wanadoo.fr, sudheer.mogilappagari@intel.com, sbhatta@marvell.com, linux-doc@vger.kernel.org, wangjie125@huawei.com, corbet@lwn.net, lkp@intel.com, gal@nvidia.com, gustavoars@kernel.org, bagasdotme@gmail.com Subject: [PATCH v4 net-next 5/5] drivers/net/phy: add driver for the onsemi NCN26000 10BASE-T1S PHY Message-ID: References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This patch adds support for the onsemi NCN26000 10BASE-T1S industrial Ethernet PHY. The driver supports Point-to-Multipoint operation without auto-negotiation and with link control handling. The PHY also features PLCA for improving performance in P2MP mode. Signed-off-by: Piergiorgio Beruto Reviewed-by: Andrew Lunn --- MAINTAINERS | 7 ++ drivers/net/phy/Kconfig | 7 ++ drivers/net/phy/Makefile | 1 + drivers/net/phy/ncn26000.c | 171 +++++++++++++++++++++++++++++++++++++ 4 files changed, 186 insertions(+) create mode 100644 drivers/net/phy/ncn26000.c diff --git a/MAINTAINERS b/MAINTAINERS index 4356382ad57c..c1dadb34009d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -15581,6 +15581,13 @@ L: linux-mips@vger.kernel.org S: Maintained F: arch/mips/boot/dts/ralink/omega2p.dts +ONSEMI ETHERNET PHY DRIVERS +M: Piergiorgio Beruto +L: netdev@vger.kernel.org +S: Supported +W: http://www.onsemi.com +F: drivers/net/phy/ncn* + OP-TEE DRIVER M: Jens Wiklander L: op-tee@lists.trustedfirmware.org diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 1327290decab..f5df2edc94a5 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -277,6 +277,13 @@ config NXP_TJA11XX_PHY help Currently supports the NXP TJA1100 and TJA1101 PHY. +config NCN26000_PHY + tristate "Onsemi 10BASE-T1S Ethernet PHY" + help + Adds support for the onsemi 10BASE-T1S Ethernet PHY. + Currently supports the NCN26000 10BASE-T1S Industrial PHY + with MII interface. + config AT803X_PHY tristate "Qualcomm Atheros AR803X PHYs and QCA833x PHYs" depends on REGULATOR diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index f7138d3c896b..b5138066ba04 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -77,6 +77,7 @@ obj-$(CONFIG_MICROCHIP_T1_PHY) += microchip_t1.o obj-$(CONFIG_MICROSEMI_PHY) += mscc/ obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm.o obj-$(CONFIG_NATIONAL_PHY) += national.o +obj-$(CONFIG_NCN26000_PHY) += ncn26000.o obj-$(CONFIG_NXP_C45_TJA11XX_PHY) += nxp-c45-tja11xx.o obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o obj-$(CONFIG_QSEMI_PHY) += qsemi.o diff --git a/drivers/net/phy/ncn26000.c b/drivers/net/phy/ncn26000.c new file mode 100644 index 000000000000..5680584f659e --- /dev/null +++ b/drivers/net/phy/ncn26000.c @@ -0,0 +1,171 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) +/* + * Driver for the onsemi 10BASE-T1S NCN26000 PHYs family. + * + * Copyright 2022 onsemi + */ +#include +#include +#include +#include +#include +#include +#include + +#include "mdio-open-alliance.h" + +#define PHY_ID_NCN26000 0x180FF5A1 + +#define NCN26000_REG_IRQ_CTL 16 +#define NCN26000_REG_IRQ_STATUS 17 + +// the NCN26000 maps link_ctrl to BMCR_ANENABLE +#define NCN26000_BCMR_LINK_CTRL_BIT BMCR_ANENABLE + +// the NCN26000 maps link_status to BMSR_ANEGCOMPLETE +#define NCN26000_BMSR_LINK_STATUS_BIT BMSR_ANEGCOMPLETE + +#define NCN26000_IRQ_LINKST_BIT BIT(0) +#define NCN26000_IRQ_PLCAST_BIT BIT(1) +#define NCN26000_IRQ_LJABBER_BIT BIT(2) +#define NCN26000_IRQ_RJABBER_BIT BIT(3) +#define NCN26000_IRQ_PLCAREC_BIT BIT(4) +#define NCN26000_IRQ_PHYSCOL_BIT BIT(5) +#define NCN26000_IRQ_RESET_BIT BIT(15) + +#define TO_TMR_DEFAULT 32 + +static int ncn26000_config_init(struct phy_device *phydev) +{ + /* HW bug workaround: the default value of the PLCA TO_TIMER should be + * 32, where the current version of NCN26000 reports 24. This will be + * fixed in future PHY versions. For the time being, we force the + * correct default here. + */ + return phy_write_mmd(phydev, MDIO_MMD_VEND2, MDIO_OATC14_PLCA_TOTMR, + TO_TMR_DEFAULT); +} + +static int ncn26000_config_aneg(struct phy_device *phydev) +{ + /* Note: the NCN26000 supports only P2MP link mode. Therefore, AN is not + * supported. However, this function is invoked by phylib to enable the + * PHY, regardless of the AN support. + */ + phydev->mdix_ctrl = ETH_TP_MDI_AUTO; + phydev->mdix = ETH_TP_MDI; + + // bring up the link + return phy_write(phydev, MII_BMCR, NCN26000_BCMR_LINK_CTRL_BIT); +} + +static int ncn26000_read_status(struct phy_device *phydev) +{ + /* The NCN26000 reports NCN26000_LINK_STATUS_BIT if the link status of + * the PHY is up. It further reports the logical AND of the link status + * and the PLCA status in the BMSR_LSTATUS bit. + */ + int ret; + + /* The link state is latched low so that momentary link + * drops can be detected. Do not double-read the status + * in polling mode to detect such short link drops except + * the link was already down. + */ + if (!phy_polling_mode(phydev) || !phydev->link) { + ret = phy_read(phydev, MII_BMSR); + if (ret < 0) + return ret; + else if (ret & NCN26000_BMSR_LINK_STATUS_BIT) + goto upd_link; + } + + ret = phy_read(phydev, MII_BMSR); + if (ret < 0) + return ret; + +upd_link: + // update link status + if (ret & NCN26000_BMSR_LINK_STATUS_BIT) { + phydev->link = 1; + phydev->pause = 0; + phydev->duplex = DUPLEX_HALF; + phydev->speed = SPEED_10; + } else { + phydev->link = 0; + phydev->duplex = DUPLEX_UNKNOWN; + phydev->speed = SPEED_UNKNOWN; + } + + return 0; +} + +static irqreturn_t ncn26000_handle_interrupt(struct phy_device *phydev) +{ + int ret; + + // read and aknowledge the IRQ status register + ret = phy_read(phydev, NCN26000_REG_IRQ_STATUS); + + // check only link status changes + if (ret < 0 || (ret & NCN26000_REG_IRQ_STATUS) == 0) + return IRQ_NONE; + + phy_trigger_machine(phydev); + return IRQ_HANDLED; +} + +static int ncn26000_config_intr(struct phy_device *phydev) +{ + int ret; + u16 irqe; + + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) { + // acknowledge IRQs + ret = phy_read(phydev, NCN26000_REG_IRQ_STATUS); + if (ret < 0) + return ret; + + // get link status notifications + irqe = NCN26000_IRQ_LINKST_BIT; + } else { + // disable all IRQs + irqe = 0; + } + + ret = phy_write(phydev, NCN26000_REG_IRQ_CTL, irqe); + if (ret != 0) + return ret; + + return 0; +} + +static struct phy_driver ncn26000_driver[] = { + { + PHY_ID_MATCH_MODEL(PHY_ID_NCN26000), + .name = "NCN26000", + .features = PHY_BASIC_T1S_P2MP_FEATURES, + .config_init = ncn26000_config_init, + .config_intr = ncn26000_config_intr, + .config_aneg = ncn26000_config_aneg, + .read_status = ncn26000_read_status, + .handle_interrupt = ncn26000_handle_interrupt, + .get_plca_cfg = genphy_c45_plca_get_cfg, + .set_plca_cfg = genphy_c45_plca_set_cfg, + .get_plca_status = genphy_c45_plca_get_status, + .soft_reset = genphy_soft_reset, + }, +}; + +module_phy_driver(ncn26000_driver); + +static struct mdio_device_id __maybe_unused ncn26000_tbl[] = { + { PHY_ID_MATCH_MODEL(PHY_ID_NCN26000) }, + { } +}; + +MODULE_DEVICE_TABLE(mdio, ncn26000_tbl); + +MODULE_AUTHOR("Piergiorgio Beruto"); +MODULE_DESCRIPTION("onsemi 10BASE-T1S PHY driver"); +MODULE_LICENSE("Dual BSD/GPL"); -- 2.37.4