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From: Michael Walle <michael@walle.cc>
To: Andrew Lunn <andrew@lunn.ch>
Cc: netdev@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: Clause 45 and Clause 22 PHYs on one MDIO bus
Date: Mon, 21 Mar 2022 22:51:29 +0100	[thread overview]
Message-ID: <e26585742f492bf03959cfc469d02c52@walle.cc> (raw)
In-Reply-To: <YjjeMo2YjMZkPIYa@lunn.ch>

Am 2022-03-21 21:21, schrieb Andrew Lunn:
> On Mon, Mar 21, 2022 at 12:21:48PM +0100, Michael Walle wrote:
>> The SoC I'm using is the LAN9668, which uses the mdio-mscc-mdio 
>> driver.
>> First problem there, it doesn't support C45 (yet) but also doesn't 
>> check
>> for MII_ADDR_C45 and happily reads/writes bogus registers.
> 
> There are many drivers like that :-(
> 
> Whenever a new driver is posted, it is one of the things i ask
> for. But older drivers are missing such checks.

Should that be a patch for net or net-next? One thing to consider;
The gpy215 is probing just fine with a c22 only mdio driver which 
doesn't
check for c45 accesses. It might read fishy registers during its probe,
though. After adding the c45 check in the mdio drivers read and write
it will fail to probe. So depending on the mdio driver it might went
unnoticed that the phy_get_c45_ids() could fail.

If it should go via net, then it should probably be accompanied
by a patch to fix the gpy_probe() (i.e. ignoring -EOPNOTSUPP
error).

-michael

  reply	other threads:[~2022-03-21 22:58 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-21 11:21 Clause 45 and Clause 22 PHYs on one MDIO bus Michael Walle
2022-03-21 11:46 ` Michael Walle
2022-03-21 20:36   ` Andrew Lunn
2022-03-21 21:41     ` Michael Walle
2022-03-21 22:34       ` Andrew Lunn
2022-03-21 20:21 ` Andrew Lunn
2022-03-21 21:51   ` Michael Walle [this message]
2022-03-21 22:37     ` Andrew Lunn

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