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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE; SFS:(13230031)(376005)(1800799015)(82310400014)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Apr 2024 23:41:55.6642 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: acaf693a-276a-4fbe-559e-08dc5e6eccfb X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH2PEPF0000013E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR12MB7468 X-BeenThere: nouveau@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Nouveau development list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: nouveau-bounces@lists.freedesktop.org Sender: "Nouveau" - needed for upcoming changes to display channel allocation APIs Signed-off-by: Ben Skeggs --- .../gpu/drm/nouveau/nvkm/engine/disp/ad102.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/base.c | 2 +- .../gpu/drm/nouveau/nvkm/engine/disp/chan.c | 15 ++++-- .../gpu/drm/nouveau/nvkm/engine/disp/g84.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/g94.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/ga102.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gf119.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gk104.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gk110.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gm107.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gm200.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gp100.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gp102.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gt200.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gt215.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/gv100.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/mcp77.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/mcp89.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/nv04.c | 5 +- .../gpu/drm/nouveau/nvkm/engine/disp/nv50.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/priv.h | 24 ++++++--- .../gpu/drm/nouveau/nvkm/engine/disp/r535.c | 26 +++------- .../gpu/drm/nouveau/nvkm/engine/disp/tu102.c | 13 +++-- .../gpu/drm/nouveau/nvkm/engine/disp/udisp.c | 49 +++++++++++++++++-- 24 files changed, 194 insertions(+), 161 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c index 7f300a79aa29..f818828e3f04 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ad102.c @@ -30,14 +30,13 @@ static const struct nvkm_disp_func ad102_disp = { .uevent = &gv100_disp_chan_uevent, .ramht_size = 0x2000, - .root = { 0, 0,AD102_DISP }, .user = { - {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new }, - {{ 0, 0,GA102_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs }, - {{ 0, 0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm }, - {{ 0, 0,AD102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core }, - {{ 0, 0,GA102_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw }, - {} + .root = { AD102_DISP }, + .caps = { GV100_DISP_CAPS , gv100_disp_caps_new }, + .curs = { GA102_DISP_CURSOR , &gv100_disp_curs }, + .wimm = { GA102_DISP_WINDOW_IMM_CHANNEL_DMA, &gv100_disp_wimm }, + .core = { AD102_DISP_CORE_CHANNEL_DMA , &gv100_disp_core }, + .wndw = { GA102_DISP_WINDOW_CHANNEL_DMA , &gv100_disp_wndw }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c index e93646d53378..6850c703ff2d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/base.c @@ -84,7 +84,7 @@ nvkm_disp_class_get(struct nvkm_oclass *oclass, int index, { struct nvkm_disp *disp = nvkm_disp(oclass->engine); if (index == 0) { - oclass->base = disp->func->root; + oclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.root.oclass }; *class = &nvkm_disp_sclass; return 0; } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c index d3c0537c08db..86938c633272 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/chan.c @@ -187,15 +187,24 @@ static int nvkm_disp_chan_new_(struct nvkm_disp *disp, int nr, const struct nvkm_oclass *oclass, void *argv, u32 argc, struct nvkm_object **pobject) { + const struct nvkm_disp_func_chan *chans[] = { + &disp->func->user.core, + &disp->func->user.base, + &disp->func->user.ovly, + &disp->func->user.wndw, + &disp->func->user.wimm, + &disp->func->user.curs, + &disp->func->user.oimm, + }; const struct nvkm_disp_chan_user *user = NULL; struct nvif_disp_chan_priv *uchan; struct nvkm_disp_chan *chan; union nvif_disp_chan_args *args = argv; int ret, i; - for (i = 0; disp->func->user[i].ctor; i++) { - if (disp->func->user[i].base.oclass == oclass->base.oclass) { - user = disp->func->user[i].chan; + for (i = 0; i < ARRAY_SIZE(chans); i++) { + if (chans[i]->oclass == oclass->base.oclass) { + user = chans[i]->chan; break; } } diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c index 1be97a68a83e..1ee61eb1faf2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g84.c @@ -330,14 +330,13 @@ g84_disp = { .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new }, .sor = { .cnt = nv50_sor_cnt, .new = g84_sor_new }, .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new }, - .root = { 0,0,G82_DISP }, .user = { - {{0,0,G82_DISP_CURSOR }, nvkm_disp_chan_new, &nv50_disp_curs }, - {{0,0,G82_DISP_OVERLAY }, nvkm_disp_chan_new, &nv50_disp_oimm }, - {{0,0,G82_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base }, - {{0,0,G82_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g84_disp_core }, - {{0,0,G82_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly }, - {} + .root = { G82_DISP }, + .curs = { G82_DISP_CURSOR , &nv50_disp_curs }, + .oimm = { G82_DISP_OVERLAY , &nv50_disp_oimm }, + .base = { G82_DISP_BASE_CHANNEL_DMA , & g84_disp_base }, + .core = { G82_DISP_CORE_CHANNEL_DMA , & g84_disp_core }, + .ovly = { G82_DISP_OVERLAY_CHANNEL_DMA, & g84_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c index 843a2661ce9d..7165b924e514 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/g94.c @@ -360,14 +360,13 @@ g94_disp = { .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new }, .sor = { .cnt = g94_sor_cnt, .new = g94_sor_new }, .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new }, - .root = { 0,0,GT206_DISP }, .user = { - {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs }, - {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm }, - {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base }, - {{0,0,GT206_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core }, - {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly }, - {} + .root = { GT206_DISP }, + .curs = { G82_DISP_CURSOR , & nv50_disp_curs }, + .oimm = { G82_DISP_OVERLAY , & nv50_disp_oimm }, + .base = { GT200_DISP_BASE_CHANNEL_DMA , & g84_disp_base }, + .core = { GT206_DISP_CORE_CHANNEL_DMA , & g94_disp_core }, + .ovly = { GT200_DISP_OVERLAY_CHANNEL_DMA, >200_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c index ab0a85c92430..c6b77e4d08a0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ga102.c @@ -133,14 +133,13 @@ ga102_disp = { .head = { .cnt = gv100_head_cnt, .new = gv100_head_new }, .sor = { .cnt = gv100_sor_cnt, .new = ga102_sor_new }, .ramht_size = 0x2000, - .root = { 0, 0,GA102_DISP }, .user = { - {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new }, - {{ 0, 0,GA102_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs }, - {{ 0, 0,GA102_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm }, - {{ 0, 0,GA102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core }, - {{ 0, 0,GA102_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw }, - {} + .root = { GA102_DISP }, + .caps = { GV100_DISP_CAPS , gv100_disp_caps_new }, + .curs = { GA102_DISP_CURSOR , &gv100_disp_curs }, + .wimm = { GA102_DISP_WINDOW_IMM_CHANNEL_DMA, &gv100_disp_wimm }, + .core = { GA102_DISP_CORE_CHANNEL_DMA , &gv100_disp_core }, + .wndw = { GA102_DISP_WINDOW_CHANNEL_DMA , &gv100_disp_wndw }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c index 83a1323600ae..5234edda8306 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gf119.c @@ -1242,14 +1242,13 @@ gf119_disp = { .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, .dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new }, .sor = { .cnt = gf119_sor_cnt, .new = gf119_sor_new }, - .root = { 0,0,GF110_DISP }, .user = { - {{0,0,GF110_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs }, - {{0,0,GF110_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm }, - {{0,0,GF110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base }, - {{0,0,GF110_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gf119_disp_core }, - {{0,0,GF110_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gf119_disp_ovly }, - {} + .root = { GF110_DISP }, + .curs = { GF110_DISP_CURSOR , &gf119_disp_curs }, + .oimm = { GF110_DISP_OVERLAY , &gf119_disp_oimm }, + .base = { GF110_DISP_BASE_CHANNEL_DMA , &gf119_disp_base }, + .core = { GF110_DISP_CORE_CHANNEL_DMA , &gf119_disp_core }, + .ovly = { GF110_DISP_OVERLAY_CONTROL_DMA, &gf119_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c index a3e2fbadade4..2f22d0cfc8ae 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk104.c @@ -314,14 +314,13 @@ gk104_disp = { .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, .dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new }, .sor = { .cnt = gf119_sor_cnt, .new = gk104_sor_new }, - .root = { 0,0,GK104_DISP }, .user = { - {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs }, - {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm }, - {{0,0,GK104_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base }, - {{0,0,GK104_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core }, - {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly }, - {} + .root = { GK104_DISP }, + .curs = { GK104_DISP_CURSOR , &gf119_disp_curs }, + .oimm = { GK104_DISP_OVERLAY , &gf119_disp_oimm }, + .base = { GK104_DISP_BASE_CHANNEL_DMA , &gf119_disp_base }, + .core = { GK104_DISP_CORE_CHANNEL_DMA , &gk104_disp_core }, + .ovly = { GK104_DISP_OVERLAY_CONTROL_DMA, &gk104_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c index 1704aa381ee9..205c05ad0306 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gk110.c @@ -40,14 +40,13 @@ gk110_disp = { .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, .dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new }, .sor = { .cnt = gf119_sor_cnt, .new = gk104_sor_new }, - .root = { 0,0,GK110_DISP }, .user = { - {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs }, - {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm }, - {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base }, - {{0,0,GK110_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core }, - {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly }, - {} + .root = { GK110_DISP }, + .curs = { GK104_DISP_CURSOR , &gf119_disp_curs }, + .oimm = { GK104_DISP_OVERLAY , &gf119_disp_oimm }, + .base = { GK110_DISP_BASE_CHANNEL_DMA , &gf119_disp_base }, + .core = { GK110_DISP_CORE_CHANNEL_DMA , &gk104_disp_core }, + .ovly = { GK104_DISP_OVERLAY_CONTROL_DMA, &gk104_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c index 688e123ad482..a57cf832e789 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm107.c @@ -94,14 +94,13 @@ gm107_disp = { .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, .dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new }, .sor = { .cnt = gf119_sor_cnt, .new = gm107_sor_new }, - .root = { 0,0,GM107_DISP }, .user = { - {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs }, - {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm }, - {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base }, - {{0,0,GM107_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core }, - {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly }, - {} + .root = { GM107_DISP }, + .curs = { GK104_DISP_CURSOR , &gf119_disp_curs }, + .oimm = { GK104_DISP_OVERLAY , &gf119_disp_oimm }, + .base = { GK110_DISP_BASE_CHANNEL_DMA , &gf119_disp_base }, + .core = { GM107_DISP_CORE_CHANNEL_DMA , &gk104_disp_core }, + .ovly = { GK104_DISP_OVERLAY_CONTROL_DMA, &gk104_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c index 511e7831b2f5..350b10d19288 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm200.c @@ -177,14 +177,13 @@ gm200_disp = { .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, .dac = { .cnt = gf119_dac_cnt, .new = gf119_dac_new }, .sor = { .cnt = gf119_sor_cnt, .new = gm200_sor_new }, - .root = { 0,0,GM200_DISP }, .user = { - {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs }, - {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm }, - {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base }, - {{0,0,GM200_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core }, - {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly }, - {} + .root = { GM200_DISP }, + .curs = { GK104_DISP_CURSOR , &gf119_disp_curs }, + .oimm = { GK104_DISP_OVERLAY , &gf119_disp_oimm }, + .base = { GK110_DISP_BASE_CHANNEL_DMA , &gf119_disp_base }, + .core = { GM200_DISP_CORE_CHANNEL_DMA , &gk104_disp_core }, + .ovly = { GK104_DISP_OVERLAY_CONTROL_DMA, &gk104_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c index 4070447bd800..c0a9e18f1ccb 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp100.c @@ -66,14 +66,13 @@ gp100_disp = { .uevent = &gf119_disp_chan_uevent, .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, .sor = { .cnt = gf119_sor_cnt, .new = gp100_sor_new }, - .root = { 0,0,GP100_DISP }, .user = { - {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gf119_disp_curs }, - {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gf119_disp_oimm }, - {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gf119_disp_base }, - {{0,0,GP100_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gk104_disp_core }, - {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gk104_disp_ovly }, - {} + .root = { GP100_DISP }, + .curs = { GK104_DISP_CURSOR , &gf119_disp_curs }, + .oimm = { GK104_DISP_OVERLAY , &gf119_disp_oimm }, + .base = { GK110_DISP_BASE_CHANNEL_DMA , &gf119_disp_base }, + .core = { GP100_DISP_CORE_CHANNEL_DMA , &gk104_disp_core }, + .ovly = { GK104_DISP_OVERLAY_CONTROL_DMA, &gk104_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c index 07e9aeec5e08..6513d0456749 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c @@ -181,14 +181,13 @@ gp102_disp = { .uevent = &gf119_disp_chan_uevent, .head = { .cnt = gf119_head_cnt, .new = gf119_head_new }, .sor = { .cnt = gf119_sor_cnt, .new = gp100_sor_new }, - .root = { 0,0,GP102_DISP }, .user = { - {{0,0,GK104_DISP_CURSOR }, nvkm_disp_chan_new, &gp102_disp_curs }, - {{0,0,GK104_DISP_OVERLAY }, nvkm_disp_chan_new, &gp102_disp_oimm }, - {{0,0,GK110_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &gp102_disp_base }, - {{0,0,GP102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gp102_disp_core }, - {{0,0,GK104_DISP_OVERLAY_CONTROL_DMA}, nvkm_disp_chan_new, &gp102_disp_ovly }, - {} + .root = { GP102_DISP }, + .curs = { GK104_DISP_CURSOR , &gp102_disp_curs }, + .oimm = { GK104_DISP_OVERLAY , &gp102_disp_oimm }, + .base = { GK110_DISP_BASE_CHANNEL_DMA , &gp102_disp_base }, + .core = { GP102_DISP_CORE_CHANNEL_DMA , &gp102_disp_core }, + .ovly = { GK104_DISP_OVERLAY_CONTROL_DMA, &gp102_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c index 6f69c4e3ade2..b97970800a90 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt200.c @@ -90,14 +90,13 @@ gt200_disp = { .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new }, .sor = { .cnt = nv50_sor_cnt, .new = g84_sor_new }, .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new }, - .root = { 0,0,GT200_DISP }, .user = { - {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs }, - {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm }, - {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base }, - {{0,0,GT200_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g84_disp_core }, - {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly }, - {} + .root = { GT200_DISP }, + .curs = { G82_DISP_CURSOR , & nv50_disp_curs }, + .oimm = { G82_DISP_OVERLAY , & nv50_disp_oimm }, + .base = { GT200_DISP_BASE_CHANNEL_DMA , & g84_disp_base }, + .core = { GT200_DISP_CORE_CHANNEL_DMA , & g84_disp_core }, + .ovly = { GT200_DISP_OVERLAY_CHANNEL_DMA, >200_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c index 6318721b66f6..ea75b23c38b3 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c @@ -248,14 +248,13 @@ gt215_disp = { .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new }, .sor = { .cnt = g94_sor_cnt, .new = gt215_sor_new }, .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new }, - .root = { 0,0,GT214_DISP }, .user = { - {{0,0,GT214_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs }, - {{0,0,GT214_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm }, - {{0,0,GT214_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base }, - {{0,0,GT214_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core }, - {{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly }, - {} + .root = { GT214_DISP }, + .curs = { GT214_DISP_CURSOR , & nv50_disp_curs }, + .oimm = { GT214_DISP_OVERLAY , & nv50_disp_oimm }, + .base = { GT214_DISP_BASE_CHANNEL_DMA , & g84_disp_base }, + .core = { GT214_DISP_CORE_CHANNEL_DMA , & g94_disp_core }, + .ovly = { GT214_DISP_OVERLAY_CHANNEL_DMA, & g84_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c index 5787fd26e5c7..7876241e10e7 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gv100.c @@ -1236,14 +1236,13 @@ gv100_disp = { .head = { .cnt = gv100_head_cnt, .new = gv100_head_new }, .sor = { .cnt = gv100_sor_cnt, .new = gv100_sor_new }, .ramht_size = 0x2000, - .root = { 0, 0,GV100_DISP }, .user = { - {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new }, - {{ 0, 0,GV100_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs }, - {{ 0, 0,GV100_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm }, - {{ 0, 0,GV100_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core }, - {{ 0, 0,GV100_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw }, - {} + .root = { GV100_DISP }, + .caps = { GV100_DISP_CAPS , gv100_disp_caps_new }, + .curs = { GV100_DISP_CURSOR , &gv100_disp_curs }, + .wimm = { GV100_DISP_WINDOW_IMM_CHANNEL_DMA, &gv100_disp_wimm }, + .core = { GV100_DISP_CORE_CHANNEL_DMA , &gv100_disp_core }, + .wndw = { GV100_DISP_WINDOW_CHANNEL_DMA , &gv100_disp_wndw }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c index 841e3b69fcaf..3d065b77229b 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp77.c @@ -53,14 +53,13 @@ mcp77_disp = { .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new }, .sor = { .cnt = g94_sor_cnt, .new = mcp77_sor_new }, .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new }, - .root = { 0,0,GT206_DISP }, .user = { - {{0,0, G82_DISP_CURSOR }, nvkm_disp_chan_new, & nv50_disp_curs }, - {{0,0, G82_DISP_OVERLAY }, nvkm_disp_chan_new, & nv50_disp_oimm }, - {{0,0,GT200_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base }, - {{0,0,GT206_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core }, - {{0,0,GT200_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, >200_disp_ovly }, - {} + .root = { GT206_DISP }, + .curs = { G82_DISP_CURSOR , & nv50_disp_curs }, + .oimm = { G82_DISP_OVERLAY , & nv50_disp_oimm }, + .base = { GT200_DISP_BASE_CHANNEL_DMA , & g84_disp_base }, + .core = { GT206_DISP_CORE_CHANNEL_DMA , & g94_disp_core }, + .ovly = { GT200_DISP_OVERLAY_CHANNEL_DMA, >200_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c index e0c5fb6df3d7..3b25c147c0c0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/mcp89.c @@ -68,14 +68,13 @@ mcp89_disp = { .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new }, .sor = { .cnt = g94_sor_cnt, .new = mcp89_sor_new }, .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new }, - .root = { 0,0,GT214_DISP }, .user = { - {{0,0,GT214_DISP_CURSOR }, nvkm_disp_chan_new, &nv50_disp_curs }, - {{0,0,GT214_DISP_OVERLAY }, nvkm_disp_chan_new, &nv50_disp_oimm }, - {{0,0,GT214_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, & g84_disp_base }, - {{0,0,GT214_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, & g94_disp_core }, - {{0,0,GT214_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, & g84_disp_ovly }, - {} + .root = { GT214_DISP }, + .curs = { GT214_DISP_CURSOR , &nv50_disp_curs }, + .oimm = { GT214_DISP_OVERLAY , &nv50_disp_oimm }, + .base = { GT214_DISP_BASE_CHANNEL_DMA , & g84_disp_base }, + .core = { GT214_DISP_CORE_CHANNEL_DMA , & g94_disp_core }, + .ovly = { GT214_DISP_OVERLAY_CHANNEL_DMA, & g84_disp_ovly }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c index e4cf11a33969..7ba9c84b027c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv04.c @@ -106,8 +106,9 @@ nv04_disp_intr(struct nvkm_disp *disp) static const struct nvkm_disp_func nv04_disp = { .intr = nv04_disp_intr, - .root = { 0, 0, NV04_DISP }, - .user = { {} }, + .user = { + .root = { NV04_DISP }, + } }; int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c index 682628fe5b20..0625f35bffec 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.c @@ -1771,14 +1771,13 @@ nv50_disp = { .dac = { .cnt = nv50_dac_cnt, .new = nv50_dac_new }, .sor = { .cnt = nv50_sor_cnt, .new = nv50_sor_new }, .pior = { .cnt = nv50_pior_cnt, .new = nv50_pior_new }, - .root = { 0, 0, NV50_DISP }, .user = { - {{0,0,NV50_DISP_CURSOR }, nvkm_disp_chan_new, &nv50_disp_curs }, - {{0,0,NV50_DISP_OVERLAY }, nvkm_disp_chan_new, &nv50_disp_oimm }, - {{0,0,NV50_DISP_BASE_CHANNEL_DMA }, nvkm_disp_chan_new, &nv50_disp_base }, - {{0,0,NV50_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &nv50_disp_core }, - {{0,0,NV50_DISP_OVERLAY_CHANNEL_DMA}, nvkm_disp_chan_new, &nv50_disp_ovly }, - {} + .root = { NV50_DISP }, + .curs = { NV50_DISP_CURSOR , &nv50_disp_curs }, + .oimm = { NV50_DISP_OVERLAY , &nv50_disp_oimm }, + .base = { NV50_DISP_BASE_CHANNEL_DMA , &nv50_disp_base }, + .core = { NV50_DISP_CORE_CHANNEL_DMA , &nv50_disp_core }, + .ovly = { NV50_DISP_OVERLAY_CHANNEL_DMA, &nv50_disp_ovly }, } }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h b/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h index 6f0b119dfd90..82b16cc9212a 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/priv.h @@ -35,14 +35,22 @@ struct nvkm_disp_func { u16 ramht_size; - struct nvkm_sclass root; - - struct nvkm_disp_user { - struct nvkm_sclass base; - int (*ctor)(const struct nvkm_oclass *, void *argv, u32 argc, - struct nvkm_object **); - const struct nvkm_disp_chan_user *chan; - } user[]; + struct { + struct { + s32 oclass; + } root; + + struct { + s32 oclass; + int (*ctor)(const struct nvkm_oclass *, void *argv, u32 argc, + struct nvkm_object **); + } caps; + + struct nvkm_disp_func_chan { + s32 oclass; + const struct nvkm_disp_chan_user *chan; + } core, base, ovly, wndw, wimm, curs, oimm; + } user; }; int nv50_disp_oneinit(struct nvkm_disp *); diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c index f94858bc64f9..067e5e7177d6 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/r535.c @@ -1417,8 +1417,8 @@ r535_disp_init(struct nvkm_disp *disp) { int ret; - ret = nvkm_gsp_rm_alloc(&disp->rm.device.object, disp->func->root.oclass << 16, - disp->func->root.oclass, 0, &disp->rm.object); + ret = nvkm_gsp_rm_alloc(&disp->rm.device.object, disp->func->user.root.oclass << 16, + disp->func->user.root.oclass, 0, &disp->rm.object); if (ret) return ret; @@ -1674,7 +1674,7 @@ r535_disp_new(const struct nvkm_disp_func *hw, struct nvkm_device *device, struct nvkm_disp_func *rm; int ret; - if (!(rm = kzalloc(sizeof(*rm) + 6 * sizeof(rm->user[0]), GFP_KERNEL))) + if (!(rm = kzalloc(sizeof(*rm), GFP_KERNEL))) return -ENOMEM; rm->dtor = r535_disp_dtor; @@ -1685,21 +1685,11 @@ r535_disp_new(const struct nvkm_disp_func *hw, struct nvkm_device *device, rm->sor.cnt = r535_sor_cnt; rm->sor.new = r535_sor_new; rm->ramht_size = hw->ramht_size; - - rm->root = hw->root; - - for (int i = 0; hw->user[i].ctor; i++) { - switch (hw->user[i].base.oclass & 0xff) { - case 0x73: rm->user[i] = hw->user[i]; break; - case 0x7d: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_core; break; - case 0x7e: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_wndw; break; - case 0x7b: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_wimm; break; - case 0x7a: rm->user[i] = hw->user[i]; rm->user[i].chan = &r535_curs; break; - default: - WARN_ON(1); - continue; - } - } + rm->user = hw->user; + rm->user.core.chan = &r535_core; + rm->user.wndw.chan = &r535_wndw; + rm->user.wimm.chan = &r535_wimm; + rm->user.curs.chan = &r535_curs; ret = nvkm_disp_new_(rm, device, type, inst, pdisp); if (ret) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c index dcb9f8ba374c..21b945a88823 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/tu102.c @@ -219,14 +219,13 @@ tu102_disp = { .head = { .cnt = gv100_head_cnt, .new = gv100_head_new }, .sor = { .cnt = gv100_sor_cnt, .new = tu102_sor_new }, .ramht_size = 0x2000, - .root = { 0, 0,TU102_DISP }, .user = { - {{-1,-1,GV100_DISP_CAPS }, gv100_disp_caps_new }, - {{ 0, 0,TU102_DISP_CURSOR }, nvkm_disp_chan_new, &gv100_disp_curs }, - {{ 0, 0,TU102_DISP_WINDOW_IMM_CHANNEL_DMA}, nvkm_disp_wndw_new, &gv100_disp_wimm }, - {{ 0, 0,TU102_DISP_CORE_CHANNEL_DMA }, nvkm_disp_core_new, &gv100_disp_core }, - {{ 0, 0,TU102_DISP_WINDOW_CHANNEL_DMA }, nvkm_disp_wndw_new, &gv100_disp_wndw }, - {} + .root = { TU102_DISP }, + .caps = { GV100_DISP_CAPS , gv100_disp_caps_new }, + .curs = { TU102_DISP_CURSOR , &gv100_disp_curs }, + .wimm = { TU102_DISP_WINDOW_IMM_CHANNEL_DMA, &gv100_disp_wimm }, + .core = { TU102_DISP_CORE_CHANNEL_DMA , &gv100_disp_core }, + .wndw = { TU102_DISP_WINDOW_CHANNEL_DMA , &gv100_disp_wndw }, }, }; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/udisp.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/udisp.c index 272d6a040a51..750db6a1eb44 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/udisp.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/udisp.c @@ -20,6 +20,7 @@ * OTHER DEALINGS IN THE SOFTWARE. */ #include "udisp.h" +#include "chan.h" #include "conn.h" #include "head.h" #include "outp.h" @@ -50,9 +51,51 @@ nvkm_udisp_sclass(struct nvkm_object *object, int index, struct nvkm_oclass *scl return 0; } - if (disp->func->user[index].ctor) { - sclass->base = disp->func->user[index].base; - sclass->ctor = disp->func->user[index].ctor; + if (disp->func->user.caps.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { -1, -1, disp->func->user.caps.oclass }; + sclass->ctor = disp->func->user.caps.ctor; + return 0; + } + + if (disp->func->user.core.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.core.oclass }; + sclass->ctor = nvkm_disp_core_new; + return 0; + } + + if (disp->func->user.base.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.base.oclass }; + sclass->ctor = nvkm_disp_chan_new; + return 0; + } + + if (disp->func->user.ovly.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.ovly.oclass }; + sclass->ctor = nvkm_disp_chan_new; + return 0; + } + + if (disp->func->user.curs.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.curs.oclass }; + sclass->ctor = nvkm_disp_chan_new; + return 0; + } + + if (disp->func->user.oimm.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.oimm.oclass }; + sclass->ctor = nvkm_disp_chan_new; + return 0; + } + + if (disp->func->user.wndw.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.wndw.oclass }; + sclass->ctor = nvkm_disp_wndw_new; + return 0; + } + + if (disp->func->user.wimm.oclass && index-- == 0) { + sclass->base = (struct nvkm_sclass) { 0, 0, disp->func->user.wimm.oclass }; + sclass->ctor = nvkm_disp_wndw_new; return 0; } -- 2.41.0