From: Jonathan Cameron <Jonathan.Cameron@Huawei.com>
To: Dan Williams <dan.j.williams@intel.com>
Cc: <linux-cxl@vger.kernel.org>,
Ben Widawsky <ben.widawsky@intel.com>, <vishal.l.verma@intel.com>,
<alison.schofield@intel.com>, <nvdimm@lists.linux.dev>,
<ira.weiny@intel.com>
Subject: Re: [PATCH v3 22/28] cxl/pmem: Add support for multiple nvdimm-bridge objects
Date: Fri, 3 Sep 2021 12:15:03 +0100 [thread overview]
Message-ID: <20210903121503.00005e57@Huawei.com> (raw)
In-Reply-To: <162982124325.1124374.4356765162960141442.stgit@dwillia2-desk3.amr.corp.intel.com>
On Tue, 24 Aug 2021 09:07:23 -0700
Dan Williams <dan.j.williams@intel.com> wrote:
> In preparation for a mocked unit test environment for CXL objects, allow
> for multiple unique nvdimm-bridge objects.
>
> For now, just allow multiple bridges to be registered. Later, when there
> are multiple present, further updates are needed to
> cxl_find_nvdimm_bridge() to identify which bridge is associated with
> which CXL hierarchy for nvdimm registration.
>
> Acked-by: Ben Widawsky <ben.widawsky@intel.com>
> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
If being extremely fussy, the change of dev_name is I think going
to result in userspace ABI changes. Should call that out even though
I can't imagine it would break anything yet.
Otherwise this is fine
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
> ---
> drivers/cxl/core/pmem.c | 32 +++++++++++++++++++++++++++++++-
> drivers/cxl/cxl.h | 2 ++
> drivers/cxl/pmem.c | 15 ---------------
> 3 files changed, 33 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/cxl/core/pmem.c b/drivers/cxl/core/pmem.c
> index 69c97cc0d945..ec3e4c642fca 100644
> --- a/drivers/cxl/core/pmem.c
> +++ b/drivers/cxl/core/pmem.c
> @@ -3,15 +3,19 @@
>
> #include <linux/device.h>
> #include <linux/slab.h>
> +#include <linux/idr.h>
> #include <cxlmem.h>
> #include <cxl.h>
>
> #include "core.h"
>
> +static DEFINE_IDA(cxl_nvdimm_bridge_ida);
> +
> static void cxl_nvdimm_bridge_release(struct device *dev)
> {
> struct cxl_nvdimm_bridge *cxl_nvb = to_cxl_nvdimm_bridge(dev);
>
> + ida_free(&cxl_nvdimm_bridge_ida, cxl_nvb->id);
> kfree(cxl_nvb);
> }
>
> @@ -35,16 +39,38 @@ struct cxl_nvdimm_bridge *to_cxl_nvdimm_bridge(struct device *dev)
> }
> EXPORT_SYMBOL_GPL(to_cxl_nvdimm_bridge);
>
> +static int match_nvdimm_bridge(struct device *dev, const void *data)
> +{
> + return dev->type == &cxl_nvdimm_bridge_type;
> +}
> +
> +struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(void)
> +{
> + struct device *dev;
> +
> + dev = bus_find_device(&cxl_bus_type, NULL, NULL, match_nvdimm_bridge);
> + if (!dev)
> + return NULL;
> + return to_cxl_nvdimm_bridge(dev);
> +}
> +EXPORT_SYMBOL_GPL(cxl_find_nvdimm_bridge);
> +
> static struct cxl_nvdimm_bridge *
> cxl_nvdimm_bridge_alloc(struct cxl_port *port)
> {
> struct cxl_nvdimm_bridge *cxl_nvb;
> struct device *dev;
> + int rc;
>
> cxl_nvb = kzalloc(sizeof(*cxl_nvb), GFP_KERNEL);
> if (!cxl_nvb)
> return ERR_PTR(-ENOMEM);
>
> + rc = ida_alloc(&cxl_nvdimm_bridge_ida, GFP_KERNEL);
> + if (rc < 0)
> + goto err;
> + cxl_nvb->id = rc;
> +
> dev = &cxl_nvb->dev;
> cxl_nvb->port = port;
> cxl_nvb->state = CXL_NVB_NEW;
> @@ -55,6 +81,10 @@ cxl_nvdimm_bridge_alloc(struct cxl_port *port)
> dev->type = &cxl_nvdimm_bridge_type;
>
> return cxl_nvb;
> +
> +err:
> + kfree(cxl_nvb);
> + return ERR_PTR(rc);
> }
>
> static void unregister_nvb(void *_cxl_nvb)
> @@ -100,7 +130,7 @@ struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
> return cxl_nvb;
>
> dev = &cxl_nvb->dev;
> - rc = dev_set_name(dev, "nvdimm-bridge");
> + rc = dev_set_name(dev, "nvdimm-bridge%d", cxl_nvb->id);
> if (rc)
> goto err;
>
> diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h
> index 53927f9fa77e..1b2e816e061e 100644
> --- a/drivers/cxl/cxl.h
> +++ b/drivers/cxl/cxl.h
> @@ -211,6 +211,7 @@ enum cxl_nvdimm_brige_state {
> };
>
> struct cxl_nvdimm_bridge {
> + int id;
> struct device dev;
> struct cxl_port *port;
> struct nvdimm_bus *nvdimm_bus;
> @@ -323,4 +324,5 @@ struct cxl_nvdimm_bridge *devm_cxl_add_nvdimm_bridge(struct device *host,
> struct cxl_nvdimm *to_cxl_nvdimm(struct device *dev);
> bool is_cxl_nvdimm(struct device *dev);
> int devm_cxl_add_nvdimm(struct device *host, struct cxl_memdev *cxlmd);
> +struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(void);
> #endif /* __CXL_H__ */
> diff --git a/drivers/cxl/pmem.c b/drivers/cxl/pmem.c
> index 6cc76302c8f8..743e2d2fdbb5 100644
> --- a/drivers/cxl/pmem.c
> +++ b/drivers/cxl/pmem.c
> @@ -33,21 +33,6 @@ static void unregister_nvdimm(void *_cxl_nvd)
> clear_exclusive_cxl_commands(cxlm, exclusive_cmds);
> }
>
> -static int match_nvdimm_bridge(struct device *dev, const void *data)
> -{
> - return strcmp(dev_name(dev), "nvdimm-bridge") == 0;
> -}
> -
> -static struct cxl_nvdimm_bridge *cxl_find_nvdimm_bridge(void)
> -{
> - struct device *dev;
> -
> - dev = bus_find_device(&cxl_bus_type, NULL, NULL, match_nvdimm_bridge);
> - if (!dev)
> - return NULL;
> - return to_cxl_nvdimm_bridge(dev);
> -}
> -
> static int cxl_nvdimm_probe(struct device *dev)
> {
> struct cxl_nvdimm *cxl_nvd = to_cxl_nvdimm(dev);
>
next prev parent reply other threads:[~2021-09-03 11:15 UTC|newest]
Thread overview: 64+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-24 16:05 [PATCH v3 00/28] cxl_test: Enable CXL Topology and UAPI regression tests Dan Williams
2021-08-24 16:05 ` [PATCH v3 01/28] libnvdimm/labels: Introduce getters for namespace label fields Dan Williams
2021-08-24 16:05 ` [PATCH v3 02/28] libnvdimm/labels: Add isetcookie validation helper Dan Williams
2021-08-24 16:05 ` [PATCH v3 03/28] libnvdimm/labels: Introduce label setter helpers Dan Williams
2021-08-24 16:05 ` [PATCH v3 04/28] libnvdimm/labels: Add a checksum calculation helper Dan Williams
2021-08-24 16:05 ` [PATCH v3 05/28] libnvdimm/labels: Add blk isetcookie set / validation helpers Dan Williams
2021-08-24 16:05 ` [PATCH v3 06/28] libnvdimm/labels: Add blk special cases for nlabel and position helpers Dan Williams
2021-08-24 16:06 ` [PATCH v3 07/28] libnvdimm/labels: Add type-guid helpers Dan Williams
2021-08-24 16:06 ` [PATCH v3 08/28] libnvdimm/labels: Add claim class helpers Dan Williams
2021-08-24 16:06 ` [PATCH v3 09/28] libnvdimm/labels: Add address-abstraction uuid definitions Dan Williams
2021-08-24 16:06 ` [PATCH v3 10/28] libnvdimm/labels: Add uuid helpers Dan Williams
2021-08-24 16:06 ` [PATCH v3 11/28] libnvdimm/label: Add a helper for nlabel validation Dan Williams
2021-09-02 16:37 ` Jonathan Cameron
2021-08-24 16:06 ` [PATCH v3 12/28] libnvdimm/labels: Introduce the concept of multi-range namespace labels Dan Williams
2021-09-02 16:43 ` Jonathan Cameron
2021-08-24 16:06 ` [PATCH v3 13/28] libnvdimm/label: Define CXL region labels Dan Williams
2021-09-02 16:36 ` Jonathan Cameron
2021-09-02 16:41 ` Jonathan Cameron
2021-09-03 3:58 ` Dan Williams
2021-08-24 16:06 ` [PATCH v3 14/28] libnvdimm/labels: Introduce CXL labels Dan Williams
2021-09-03 17:00 ` Dan Williams
2021-08-24 16:06 ` [PATCH v3 15/28] cxl/pci: Make 'struct cxl_mem' device type generic Dan Williams
2021-09-02 16:55 ` Jonathan Cameron
2021-09-02 17:34 ` Dan Williams
2021-08-24 16:06 ` [PATCH v3 16/28] cxl/mbox: Introduce the mbox_send operation Dan Williams
2021-09-02 17:07 ` Jonathan Cameron
2021-08-24 16:06 ` [PATCH v3 17/28] cxl/mbox: Move mailbox and other non-PCI specific infrastructure to the core Dan Williams
2021-09-02 17:56 ` Jonathan Cameron
2021-09-02 18:56 ` Dan Williams
2021-08-24 16:07 ` [PATCH v3 18/28] cxl/pci: Use module_pci_driver Dan Williams
2021-09-02 17:58 ` Jonathan Cameron
2021-08-24 16:07 ` [PATCH v3 19/28] cxl/mbox: Convert 'enabled_cmds' to DECLARE_BITMAP Dan Williams
2021-09-02 17:59 ` Jonathan Cameron
2021-08-24 16:07 ` [PATCH v3 20/28] cxl/mbox: Add exclusive kernel command support Dan Williams
2021-09-02 18:09 ` Jonathan Cameron
2021-09-03 20:47 ` Dan Williams
2021-08-24 16:07 ` [PATCH v3 21/28] cxl/pmem: Translate NVDIMM label commands to CXL label commands Dan Williams
2021-09-02 18:22 ` Jonathan Cameron
2021-09-03 21:09 ` Dan Williams
2021-08-24 16:07 ` [PATCH v3 22/28] cxl/pmem: Add support for multiple nvdimm-bridge objects Dan Williams
2021-09-03 11:15 ` Jonathan Cameron [this message]
2021-08-24 16:07 ` [PATCH v3 23/28] cxl/acpi: Do not add DSDT disabled ACPI0016 host bridge ports Dan Williams
2021-09-02 18:30 ` Jonathan Cameron
2021-09-03 17:51 ` Dan Williams
2021-08-24 16:07 ` [PATCH v3 24/28] tools/testing/cxl: Introduce a mocked-up CXL port hierarchy Dan Williams
2021-09-03 12:52 ` Jonathan Cameron
2021-09-03 21:49 ` Dan Williams
2021-09-06 8:32 ` Jonathan Cameron
2021-09-07 15:57 ` Dan Williams
2021-08-24 16:07 ` [PATCH v3 25/28] cxl/bus: Populate the target list at decoder create Dan Williams
2021-09-03 12:59 ` Jonathan Cameron
2021-09-03 22:43 ` Dan Williams
2021-09-06 8:52 ` Jonathan Cameron
2021-08-24 16:07 ` [PATCH v3 26/28] cxl/mbox: Move command definitions to common location Dan Williams
2021-09-03 13:04 ` Jonathan Cameron
2021-08-24 16:07 ` [PATCH v3 27/28] tools/testing/cxl: Introduce a mock memory device + driver Dan Williams
2021-09-03 13:21 ` Jonathan Cameron
2021-09-03 23:33 ` Dan Williams
2021-09-06 8:57 ` Jonathan Cameron
2021-08-24 16:07 ` [PATCH v3 28/28] cxl/core: Split decoder setup into alloc + add Dan Williams
2021-09-03 13:33 ` Jonathan Cameron
2021-09-03 16:26 ` Dan Williams
2021-09-03 18:01 ` Jonathan Cameron
2021-09-04 0:27 ` Dan Williams
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