Re: caching options

[Brian Stark <brian.stark@sanmina.com>]

Thanks,

Brian

On Thu, Aug 2, 2018 at 11:00 AM Elliott, Robert (Persistent Memory) <
elliott@hpe.com> wrote:

>
>
> > -----Original Message-----
> > From: Linux-nvdimm <linux-nvdimm-bounces@lists.01.org> On Behalf Of
> > Brian Stark
> > Sent: Tuesday, July 31, 2018 11:43 AM
> > To: linux-nvdimm@lists.01.org
> > Subject: caching options
> >
> > I have a customer that requires persistent memory be set to Write
> > Combining cache attribute with the Skylake processor.  Is Write
> > Combining for persistent memory supported in Linux?
> >
> > Brian Stark
>
> There's no API for applications to specify that right now.
>
> You can recompile the kernel with this patch:
>
> $ git diff
> diff --git a/include/linux/libnvdimm.h b/include/linux/libnvdimm.h
> index 097072c5a852..d3f165d9ed77 100644
> --- a/include/linux/libnvdimm.h
> +++ b/include/linux/libnvdimm.h
> @@ -206,7 +206,7 @@ int nvdimm_has_flush(struct nd_region *nd_region);
> int nvdimm_has_cache(struct nd_region *nd_region);
>
> #ifdef CONFIG_ARCH_HAS_PMEM_API
> -#define ARCH_MEMREMAP_PMEM MEMREMAP_WB
> +#define ARCH_MEMREMAP_PMEM MEMREMAP_WC
> void arch_wb_cache_pmem(void *addr, size_t size);
> void arch_invalidate_pmem(void *addr, size_t size);
> #else
>
> to cause persistent memory ranges used in "raw mode" to be marked as
> write-combining rather than writeback cacheable.
>
> The other modes (sector, fsdax, and devdax) require different patches,
> as the kernel maps memory differently for them.
>
> You can confirm the write-combining settings if:
> * the kernel is compiled with CONFIG_DEBUG_FS
> * the debug filesystem is mounted with mount -t debugfs debugfs
> /sys/kernel/debug
>
> $ sudo cat /sys/kernel/debug/x86/pat_memtype_list
> PAT memtype list:
> ...
> write-combining @ 0x880000000-0xa80000000
> write-combining @ 0xa80000000-0xc80000000
> ...
>
> The persistent memory addresses are reported in /proc/iomem
> (e.g., starting at 0x880000000 on my test system).
>
> ---
> Robert Elliott, HPE Persistent Memory
>
>
>

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