From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=BAYES_05,DKIM_INVALID, DKIM_SIGNED,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A5435C4361B for ; Fri, 11 Dec 2020 22:14:46 +0000 (UTC) Received: from ml01.01.org (ml01.01.org [198.145.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id EB86F23EF1 for ; Fri, 11 Dec 2020 22:14:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org EB86F23EF1 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-nvdimm-bounces@lists.01.org Received: from ml01.vlan13.01.org (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 4F420100EB32F; Fri, 11 Dec 2020 14:14:45 -0800 (PST) Received-SPF: Pass (mailfrom) identity=mailfrom; client-ip=198.145.29.99; helo=mail.kernel.org; envelope-from=luto@kernel.org; receiver= Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 22F15100EB323 for ; Fri, 11 Dec 2020 14:14:43 -0800 (PST) X-Gm-Message-State: AOAM5335SICCXXS6xt91J+dA+jeyJ1zVR7leyEBCPlk1ZgnOdPVud/g2 c3Darz0f86UUcV9gIj9Kg9rhmSSOd/E0zHFV1fUNqQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1607724882; bh=70LTUMehFh83IHad/vkXff9wd8DJwarU76xfxtWTpbY=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=jPAdTjcAVpZyDFTaPihJOsnveXonsw5iOC6B7KbDZDjzqZNwbm7CsmLDH3yR0AMID SNfPGfnjQ3iWvMryER3GLaa8smv8iVvQy2GhAyVriM92szYovmcCUtjEsGsqB+wLEu 7R/8evzBvMtqXX/2o39B34SfiJoMfQ9d2yPn0icWzRf3+6zFxZ2pNb/c6qokJB+How 9HXBSycFcdAQzwnvNh3IDX4+qV7Qgi8aIYQK+QaOB/Jj0HXGnIYfXkI3qp+mFM3IOV v2A5PmGBQtslguW0eYDMFhwLH/Gqey8aJRD7LMfwaHCIDkWMKrpYuCoQlC3FRomXfL wiJq08Nve+OvA== X-Google-Smtp-Source: ABdhPJwyiUgo4QSzbgQvODMi2EdGDgMycwa95HkgOC2v3m4y50nPJcH7R/4+bPCwIYyM+uNouuOpofy5wtqF2/93N+Q= X-Received: by 2002:a5d:4905:: with SMTP id x5mr825454wrq.75.1607724880704; Fri, 11 Dec 2020 14:14:40 -0800 (PST) MIME-Version: 1.0 References: <20201106232908.364581-6-ira.weiny@intel.com> <20201124060956.1405768-1-ira.weiny@intel.com> In-Reply-To: <20201124060956.1405768-1-ira.weiny@intel.com> From: Andy Lutomirski Date: Fri, 11 Dec 2020 14:14:28 -0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH V3.1] entry: Pass irqentry_state_t by reference To: Weiny Ira Message-ID-Hash: RFSSFYZ4376ZTMCEPVWDT4JMI5A5OZQJ X-Message-ID-Hash: RFSSFYZ4376ZTMCEPVWDT4JMI5A5OZQJ X-MailFrom: luto@kernel.org X-Mailman-Rule-Hits: nonmember-moderation X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation CC: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Andy Lutomirski , Peter Zijlstra , Dave Hansen , X86 ML , LKML , Andrew Morton , Fenghua Yu , "open list:DOCUMENTATION" , linux-nvdimm , Linux-MM , "open list:KERNEL SELFTEST FRAMEWORK" , Greg KH X-Mailman-Version: 3.1.1 Precedence: list List-Id: "Linux-nvdimm developer list." Archived-At: List-Archive: List-Help: List-Post: List-Subscribe: List-Unsubscribe: Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit On Mon, Nov 23, 2020 at 10:10 PM wrote: > > From: Ira Weiny > > Currently struct irqentry_state_t only contains a single bool value > which makes passing it by value is reasonable. However, future patches > add information to this struct. This includes the PKRS thread state, > included in this series, as well as information to store kmap reference > tracking and PKS global state outside this series. In total, we > anticipate 2 new 32 bit fields and an integer field to be added to the > struct beyond the existing bool value. > > Adding information to irqentry_state_t makes passing by value less > efficient. Therefore, change the entry/exit calls to pass irq_state by > reference in preparation for the changes which follow. > > While at it, make the code easier to follow by changing all the usage > sites to consistently use the variable name 'irq_state'. After contemplating this for a bit, I think this isn't really the right approach. It *works*, but we've mostly just created a bit of an unfortunate situation. Our stack, on a (possibly nested) entry looks like: previous frame (or empty if we came from usermode) --- SS RSP FLAGS CS RIP rest of pt_regs C frame irqentry_state_t (maybe -- the compiler is within its rights to play almost arbitrary games here) more C stuff So what we've accomplished is having two distinct arch register regions, one called pt_regs and the other stuck in irqentry_state_t. This is annoying because it means that, if we want to access this thing without passing a pointer around or access it at all from outer frames, we need to do something terrible with the unwinder, and we don't want to go there. So I propose a somewhat different solution: lay out the stack like this. SS RSP FLAGS CS RIP rest of pt_regs PKS ^^^^^^^^ extended_pt_regs points here C frame more C stuff ... IOW we have: struct extended_pt_regs { bool rcu_whatever; other generic fields here; struct arch_extended_pt_regs arch_regs; struct pt_regs regs; }; and arch_extended_pt_regs has unsigned long pks; and instead of passing a pointer to irqentry_state_t to the generic entry/exit code, we just pass a pt_regs pointer. And we have a little accessor like: struct extended_pt_regs *extended_regs(struct pt_regs *) { return container_of(...); } And we tell eBPF that extended_pt_regs is NOT ABI, and we will change it whenever we feel like just to keep you on your toes, thank you very much. Does this seem reasonable? You get to drop patch 7 and instead modify the show_regs() stuff to just display one extra register. _______________________________________________ Linux-nvdimm mailing list -- linux-nvdimm@lists.01.org To unsubscribe send an email to linux-nvdimm-leave@lists.01.org