From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=66.111.4.25; helo=out1-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="QTWQPU/1"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="JobL1H2w"; dkim-atps=neutral Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 41j1Jp3rHhzF2Db for ; Sat, 4 Aug 2018 08:03:37 +1000 (AEST) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 156CC21F17; Fri, 3 Aug 2018 18:03:34 -0400 (EDT) Received: from web5 ([10.202.2.215]) by compute4.internal (MEProxy); Fri, 03 Aug 2018 18:03:35 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=cc :content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=fm3; bh=tXh0bdd/g+2JH3Yt7t7RHx6g2zNlG hLM9zUH9zejvwo=; b=QTWQPU/1pYKNeWjPhDbnXkwMorQ/YWrKOauPUIofqDfPY GfCKj+L8RIBprDDL+JwrNr79PeqdfJUKegezb5bhua+Bl461MjEb17xX1K5X35pq Tl2l46CbG3HWUSrakt5ILD23ySCr1wYEsEmiPTdP697EHW13IJ4rhxjzeFgmjfnE /E0TpuB9vLpq285s56RxGVMtNjFliB984cpTQo7F15zBjJ2ZeGC/W2Rp8ucl7J3f vwWWi0Q72a3HIE9KcYzeYTsNqGImQ185XxqL+qqPj5WR9CiQ4UllEDHW3SWNZTZA M0EmZ76AkTrKyvAtNXzIoRp8BZT5T97BAK7CfzHzA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=tXh0bd d/g+2JH3Yt7t7RHx6g2zNlGhLM9zUH9zejvwo=; b=JobL1H2wnNZrKZK2kXtU7M Qp5hYGWCsRSt5rx8qVkXkeJo+38KrswmU+6TmQUlDKBaXft9W8V9Ple+PHZO25pg do3zdIlLJtnW2d0pLiPycq4LdWcnVt51xchXYlKiyG92qIcszyTYUoOliwIIqO1q MGL8oOB6KWJ3RYIOiwe06WYG5MD9VR3tb/dQXXeGFc4C5TKoziX1imRuOUqzhdZA tqC64c7F2Kd9/Ld9pZIF580Rbs3jOKRA1A2L8gk36do465ebNUhkKROUVM2YEtWo OZa7EnszPf4yHX1KGjz0xYXJRSYAwItiUg4rMBt2abSH4F2LP5CWBfSPvX6AP2Yw == X-ME-Proxy: X-ME-Sender: Received: by mailuser.nyi.internal (Postfix, from userid 99) id 785179E0D5; Fri, 3 Aug 2018 18:03:33 -0400 (EDT) Message-Id: <1533333813.4174910.1462882280.737C2773@webmail.messagingengine.com> From: Andrew Jeffery To: Patrick Venture Cc: Oskar Senft , Lei YU , OpenBMC Maillist , =?utf-8?Q?=E5=BC=B5=E6=BC=A2=E5=BD=AC?= MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="utf-8" X-Mailer: MessagingEngine.com Webmail Interface - ajax-2be8cd1b Date: Sat, 04 Aug 2018 07:33:33 +0930 References: <1533172735.788524.1460630440.2817ADF0@webmail.messagingengine.com> <1533180811.827947.1460716960.2A06961A@webmail.messagingengine.com> Subject: Re: UART Route setting In-Reply-To: X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 03 Aug 2018 22:03:42 -0000 On Sat, 4 Aug 2018, at 00:29, Patrick Venture wrote: > On Wed, Aug 1, 2018 at 8:33 PM, Andrew Jeffery wrote: > > On Thu, 2 Aug 2018, at 12:50, Oskar Senft wrote: > >> Interesting suggestion, that looks promising, thank you? > >> > >> What's the state of that driver? I.e. where do we expect it to land? > > > > If you think the bmc-misc-ctrl series is useful, please reply to the > > upstream thread to outline all of your use-cases. There's a lot of push- > > back on using the devicetree to describe these features, and I haven't > > had a lot of feedback on the acceptability of the rest (driver itself, > > userspace ABI). > > > > The more evidence we have of this being necessary/useful the better. > > I just skimmed that message, and we're looking for a mechanism to set > in the kernel some bits in the hwstrapping and other hardware > registers to do things like restrict P2A ranges, disable lpc2ahb > stuff, etc. Things we had hacked into the mach-aspeed.c (iirc), and I > wasn't sure it made sense to write a half dozen small drivers to > control these individual things -- would these kind of use cases fall > under this misc driver? Yes, everything you listed there was a strong motivation for the series. Cheers Andrew