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[125.227.158.249]) by smtp.gmail.com with ESMTPSA id h186sm4546568pgc.38.2021.02.18.23.11.13 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Thu, 18 Feb 2021 23:11:14 -0800 (PST) From: Willie Thai X-Google-Original-From: Willie Thai To: joel@jms.id.au, openbmc@lists.ozlabs.org, andrew@aj.id.au Subject: [[PATCH linux dev-5.8] ARM: dts: Aspeed: Add Compal's Liwu2 BMC machine] ARM: dts: aspeed: Add device tree for Compal's Liwu2 BMC Date: Fri, 19 Feb 2021 15:11:10 +0800 Message-Id: <1613718670-24417-1-git-send-email-willie_thai@compal.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: References: X-Mailman-Approved-At: Mon, 22 Feb 2021 10:41:17 +1100 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Willie Thai Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" The Liwu2 is a server platform with an ASPEED AST2500 based BMC. Reviewed-by: Andrew Jeffery Reviewed-by: Joel Stanley Signed-off-by: willie_thai@compal.com --- arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts | 325 ++++++++++++++++++++++++++ 2 files changed, 326 insertions(+) create mode 100644 arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6320124..a67576d 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1354,6 +1354,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \ aspeed-bmc-arm-centriq2400-rep.dtb \ aspeed-bmc-arm-stardragon4800-rep2.dtb \ aspeed-bmc-bytedance-g220a.dtb \ + aspeed-bmc-compal-liwu2.dtb \ aspeed-bmc-facebook-cmm.dtb \ aspeed-bmc-facebook-minipack.dtb \ aspeed-bmc-facebook-tiogapass.dtb \ diff --git a/arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts b/arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts new file mode 100644 index 0000000..68faf3d --- /dev/null +++ b/arch/arm/boot/dts/aspeed-bmc-compal-liwu2.dts @@ -0,0 +1,325 @@ +// SPDX-License-Identifier: GPL-2.0+ +/dts-v1/; + +#include "aspeed-g5.dtsi" +#include + +/ { + model = "AST2500 liwu2"; + compatible = "aspeed,ast2500"; + + aliases { + serial4 = &uart5; + }; + + chosen { + stdout-path = &uart5; + bootargs = "console=tty0 console=ttyS4,115200 earlyprintk"; + }; + + memory@80000000 { + reg = <0x80000000 0x20000000>; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + gfx_memory: framebuffer { + size = <0x01000000>; + alignment = <0x01000000>; + compatible = "shared-dma-pool"; + reusable; + }; + }; + + iio-hwmon { + compatible = "iio-hwmon"; + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, + <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, + <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; + }; + + leds { + compatible = "gpio-leds"; + + led_fan0_fault { + label = "LED_FAN0_FAULT"; + gpios = <&gpio ASPEED_GPIO(F, 4) GPIO_ACTIVE_LOW>; + }; + + led_fan1_fault { + label = "LED_FAN1_FAULT"; + gpios = <&gpio ASPEED_GPIO(F, 5) GPIO_ACTIVE_LOW>; + }; + + led_fan2_fault { + label = "LED_FAN2_FAULT"; + gpios = <&gpio ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>; + }; + + led_fan3_fault { + label = "LED_FAN3_FAULT"; + gpios = <&gpio ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>; + }; + + led_fan4_fault { + label = "LED_FAN4_FAULT"; + gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>; + }; + + led_fan5_fault { + label = "LED_FAN5_FAULT"; + gpios = <&gpio ASPEED_GPIO(H, 7) GPIO_ACTIVE_LOW>; + }; + + fp_led_status_amber_n { + label = "FP_LED_STATUS_AMBER_N"; + gpios = <&gpio ASPEED_GPIO(S, 5) GPIO_ACTIVE_LOW>; + }; + + rear_id_led_n { + label = "REAR_ID_LED_N"; + gpios = <&gpio ASPEED_GPIO(S, 6) GPIO_ACTIVE_LOW>; + }; + }; +}; + +&fmc { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "bmc"; + spi-max-frequency = <50000000>; +#include "openbmc-flash-layout.dtsi" + }; +}; + +&spi1 { + status = "okay"; + flash@0 { + status = "okay"; + m25p,fast-read; + label = "pnor"; + spi-max-frequency = <100000000>; + }; +}; + +&spi2 { + status = "okay"; +}; + +&uart5 { + status = "okay"; +}; + +&mac0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>; +}; + +&mac1 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; +}; + +&adc { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + eeprom@54 { + compatible = "atmel,24c64"; + reg = <0x54>; + pagesize = <32>; + }; +}; + +&i2c2 { + status = "okay"; +}; + +&i2c3 { + status = "okay"; + + tmp75@48 { + compatible = "ti,tmp75"; + reg = <0x48>; + }; + + tmp75@4b { + compatible = "ti,tmp75"; + reg = <0x4b>; + }; + + tmp75@4c { + compatible = "ti,tmp75"; + reg = <0x4c>; + }; + + tmp75@4d { + compatible = "ti,tmp75"; + reg = <0x4d>; + }; + + vr-controller@5a { + compatible = "ti,tps53679"; + reg = <0x5a>; + }; + + vr-controller@5d { + compatible = "ti,tps53679"; + reg = <0x5d>; + }; + + vr-controller@68 { + compatible = "ti,tps53679"; + reg = <0x68>; + }; + + vr-controller@6a { + compatible = "ti,tps53679"; + reg = <0x6a>; + }; + + vr-controller@6c { + compatible = "ti,tps53679"; + reg = <0x6c>; + }; + + vr-controller@6e { + compatible = "ti,tps53679"; + reg = <0x6e>; + }; + +}; + +&i2c4 { + status = "okay"; + + eeprom@51 { + compatible = "atmel,24c64"; + reg = <0x51>; + pagesize = <32>; + }; +}; + +&i2c5 { + status = "okay"; +}; + +&i2c6 { + status = "okay"; +}; + +&i2c7 { + status = "okay"; + + power-supply@58 { + compatible = "pmbus"; + reg = <0x58>; + }; + + power-supply@59 { + compatible = "pmbus"; + reg = <0x59>; + }; +}; + + +&sdmmc { + status = "okay"; +}; + +&sdhci0 { + status = "okay"; + + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sd1_default>; +}; + +/* + * Enable port A as device (via the virtual hub) and port B as + * host by default on the eval board. This can be easily changed + * by replacing the override below with &ehci0 { ... } to enable + * host on both ports. + */ +&vhub { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&uhci { + status = "okay"; +}; + +&gfx { + status = "okay"; + memory-region = <&gfx_memory>; +}; + +&pwm_tacho { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default + &pinctrl_pwm2_default &pinctrl_pwm3_default + &pinctrl_pwm4_default &pinctrl_pwm5_default + &pinctrl_pwm6_default &pinctrl_pwm7_default>; + + fan@0 { + reg = <0x00>; + aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; + }; + + fan@1 { + reg = <0x01>; + aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; + }; + + fan@2 { + reg = <0x02>; + aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; + }; + + fan@3 { + reg = <0x03>; + aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; + }; + + fan@4 { + reg = <0x04>; + aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; + }; + + fan@5 { + reg = <0x05>; + aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>; + }; + + fan@6 { + reg = <0x06>; + aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>; + }; + + fan@7 { + reg = <0x07>; + aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>; + }; + +}; -- 2.7.4