From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=permerror (mailfrom) smtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57; helo=gate.crashing.org; envelope-from=benh@kernel.crashing.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 41FjLw42Y5zF158; Wed, 27 Jun 2018 09:44:39 +1000 (AEST) Received: from pasglop.au.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id w5QNNMmr022709; Tue, 26 Jun 2018 18:23:54 -0500 From: Benjamin Herrenschmidt To: Joel Stanley Cc: linux-aspeed@lists.ozlabs.org, openbmc@lists.ozlabs.org, devicetree@vger.kernel.org, Andrew Jeffery , linux-kernel@vger.kernel.org, Benjamin Herrenschmidt Subject: [PATCH 04/14] fsi: master-gpio: Rename and adjust send delay Date: Wed, 27 Jun 2018 09:23:11 +1000 Message-Id: <20180626232321.12372-5-benh@kernel.crashing.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180626232321.12372-1-benh@kernel.crashing.org> References: <20180626232321.12372-1-benh@kernel.crashing.org> X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 26 Jun 2018 23:44:41 -0000 What the driver called "FSI_GPIO_PRIME_SLAVE_CLOCKS" is what the FSI spec calls tSendDelay and should be 16 clocks by default. Signed-off-by: Benjamin Herrenschmidt --- drivers/fsi/fsi-master-gpio.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c index 1fd8b417939d..836587701ceb 100644 --- a/drivers/fsi/fsi-master-gpio.c +++ b/drivers/fsi/fsi-master-gpio.c @@ -18,6 +18,7 @@ #define FSI_GPIO_STD_DLY 1 /* Standard pin delay in nS */ #define FSI_ECHO_DELAY_CLOCKS 16 /* Number clocks for echo delay */ +#define FSI_SEND_DELAY_CLOCKS 16 /* Number clocks for send delay */ #define FSI_PRE_BREAK_CLOCKS 50 /* Number clocks to prep for break */ #define FSI_BREAK_CLOCKS 256 /* Number of clocks to issue break */ #define FSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam */ @@ -48,7 +49,6 @@ #define FSI_GPIO_CRC_SIZE 4 #define FSI_GPIO_MSG_ID_SIZE 2 #define FSI_GPIO_MSG_RESPID_SIZE 2 -#define FSI_GPIO_PRIME_SLAVE_CLOCKS 20 #define LAST_ADDR_INVALID 0x1 @@ -535,9 +535,12 @@ static int poll_for_response(struct fsi_master_gpio *master, if (busy_count > 0) trace_fsi_master_gpio_poll_response_busy(master, busy_count); fail: - /* Clock the slave enough to be ready for next operation */ + /* + * tSendDelay clocks, avoids signal reflections when switching + * from receive of response back to send of data. + */ local_irq_save(flags); - clock_zeros(master, FSI_GPIO_PRIME_SLAVE_CLOCKS); + clock_zeros(master, FSI_SEND_DELAY_CLOCKS); local_irq_restore(flags); return rc; -- 2.17.1