From: Joel Stanley <joel@jms.id.au>
To: Andrew Jeffery <andrew@aj.id.au>
Cc: openbmc@lists.ozlabs.org
Subject: [PATCH] ARM: dts: aspeed: p10bmc: Define secure boot gpio
Date: Thu, 23 Sep 2021 17:16:06 +0930 [thread overview]
Message-ID: <20210923074606.283393-1-joel@jms.id.au> (raw)
The secure boot GPIO is connected to a jumper that can be used to enable
or disable the enforcement of secure boot policy.
When in the secure boot state, it makes the EEPROM at 0x50 on bus 14
read only.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts | 2 +-
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
index bb6bbcb4e14f..587cd83cffb1 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-everest.dts
@@ -272,7 +272,7 @@ &gpio0 {
"factory-reset-toggle","",
/*G0-G7*/ "","","","","","","","",
/*H0-H7*/ "led-rtc-battery","led-bmc","led-rear-enc-id0","led-rear-enc-fault0","","","","",
- /*I0-I7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","bmc-secure-boot","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 4f108e4e454f..21c64fe14186 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -249,7 +249,7 @@ &gpio0 {
/*F0-F7*/ "","","","","","","factory-reset-toggle","",
/*G0-G7*/ "","","","","","","","",
/*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",
- /*I0-I7*/ "","","","","","","","",
+ /*I0-I7*/ "","","","","","","bmc-secure-boot","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
/*L0-L7*/ "","","","","","","","",
--
2.33.0
reply other threads:[~2021-09-23 7:47 UTC|newest]
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