From: George Hung <ghung.quanta@gmail.com>
To: Joel Stanley <joel@jms.id.au>
Cc: kwliu@nuvoton.com, Fran.Hsu@quantatw.com,
benjaminfair@google.com, wltu@google.com,
openbmc@lists.ozlabs.org, brandonkim@google.com,
Avi.Fishman@nuvoton.com, tomer.maimon@nuvoton.com
Subject: [PATCH dev-5.14 v1] ARM: dts: nuvoton: gbs: split SPI flash partition
Date: Fri, 8 Oct 2021 13:30:06 +0800 [thread overview]
Message-ID: <20211008053006.31961-1-george.hung@quantatw.com> (raw)
Split the primary and secondary BIOS SPI EEPROMs in 2 partitions
Signed-off-by: George Hung <george.hung@quantatw.com>
---
arch/arm/boot/dts/nuvoton-npcm730-gbs.dts | 27 +++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
index eb6eb21cb2a4..f20c2ae4f576 100644
--- a/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
+++ b/arch/arm/boot/dts/nuvoton-npcm730-gbs.dts
@@ -415,6 +415,19 @@ spi-nor@0 {
spi-rx-bus-width = <2>;
m25p,fast-read;
label = "pnor";
+ partitions@a0000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pnor-primary@0 {
+ label = "pnor-primary";
+ reg = <0x0000000 0x2000000>;
+ };
+ pnor-scratch@2000000 {
+ label = "pnor-scratch";
+ reg = <0x2000000 0x2000000>;
+ };
+ };
};
spi-nor@1 {
compatible = "jedec,spi-nor";
@@ -424,6 +437,20 @@ spi-nor@1 {
spi-max-frequency = <50000000>;
spi-rx-bus-width = <2>;
m25p,fast-read;
+ label = "pnor-2";
+ partitions@a0000000 {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ pnor-primary@0 {
+ label = "pnor-2-primary";
+ reg = <0x0000000 0x2000000>;
+ };
+ pnor-scratch@2000000 {
+ label = "pnor-2-scratch";
+ reg = <0x2000000 0x2000000>;
+ };
+ };
};
};
--
2.32.0
next reply other threads:[~2021-10-08 5:41 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-08 5:30 George Hung [this message]
2021-10-11 5:14 ` [PATCH dev-5.14 v1] ARM: dts: nuvoton: gbs: split SPI flash partition Joel Stanley
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