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Wed, 15 Sep 2021 19:10:12 +0000 (GMT) Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 66E04C605F; Wed, 15 Sep 2021 19:10:10 +0000 (GMT) Received: from smtpclient.apple (unknown [9.77.132.249]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTPS; Wed, 15 Sep 2021 19:10:10 +0000 (GMT) Content-Type: multipart/alternative; boundary="Apple-Mail=_F225E0ED-03A6-423F-BB15-CA369B1C4DC6" Subject: Re: [EXTERNAL] [PATCH v2] ARM: dts: aspeed: rainier: Add N_MODE_VREF gpio From: Adriana Kobylak X-Priority: 3 (Normal) In-Reply-To: Date: Wed, 15 Sep 2021 14:10:08 -0500 Message-Id: <26DB52A3-A380-475E-B335-D866DDD0150E@linux.ibm.com> References: <20210910195417.2838841-1-anoo@linux.ibm.com> <23EB5226-63A1-45AF-A50E-2A9D6DABFC08@linux.ibm.com> To: Milton Miller II X-Mailer: Apple Mail (2.3654.120.0.1.13) X-TM-AS-GCONF: 00 X-Proofpoint-GUID: ZOtGgVJ24DTA7mp3NotzCKPAGNU7om50 X-Proofpoint-ORIG-GUID: I0sVe0wRVpIsfmvbFyTwUUJf5Ff79XVu X-Proofpoint-UnRewURL: 1 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.687,Hydra:6.0.235,FMLib:17.0.607.475 definitions=2020-10-13_15,2020-10-13_02,2020-04-07_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 impostorscore=0 adultscore=0 phishscore=0 bulkscore=0 mlxlogscore=999 clxscore=1011 malwarescore=0 mlxscore=0 priorityscore=1501 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2109030001 definitions=main-2109150102 X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Matt Spinler , Derek Howard , linux-aspeed , Andrew Jeffery , Adriana Kobylak , Brandon Wyman , Shawn McCarney , OpenBMC Maillist , Linux ARM Errors-To: openbmc-bounces+openbmc=archiver.kernel.org@lists.ozlabs.org Sender: "openbmc" --Apple-Mail=_F225E0ED-03A6-423F-BB15-CA369B1C4DC6 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable > On Sep 15, 2021, at 12:15 AM, Milton Miller II wrote: >=20 > On September 14, 2021, Joel Stanley wrote: >> On Tue, 14 Sept 2021 at 20:46, Adriana Kobylak >> wrote: >>>> On Sep 14, 2021, at 3:49 AM, Joel Stanley wrote: >>>> On Fri, 10 Sept 2021 at 19:54, Adriana Kobylak >>>> wrote: >>>>>=20 >>>>> From: Adriana Kobylak >>>>>=20 >>>>> The N_MODE_VREF gpio is designed to be used to specify how many >>>>> power >>>>> supplies the system should have (2 or 4). If enough power >>>>> supplies fail >>>>> so that the system no longer has redundancy (no longer n+1), the >>>>> hardware will signal to the Onboard Chip Controller that the >>>>> system may >>>>> be oversubscribed, and performance may need to be reduced so the >>>>> system >>>>> can maintain it's powered on state. This gpio is on a 9552, >>>>> populate all >>>>> the gpios on that chip for completeness. >>>>>=20 >>>>> Signed-off-by: Adriana Kobylak >>>>> --- >>>>>=20 >>>>> v2: Update commit message. >>>>>=20 >>>>> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 103 >> +++++++++++++++++++ >>>>> 1 file changed, 103 insertions(+) >>>>>=20 >>>>> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts >> b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts >>>>> index 6fd3ddf97a21..d5eea86dc260 100644 >>>>> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts >>>>> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts >>>>> @@ -1502,6 +1502,109 @@ eeprom@51 { >>>>> reg =3D <0x51>; >>>>> }; >>>>>=20 >>>>> + pca_pres3: pca9552@60 { >>>>> + compatible =3D "nxp,pca9552"; >>>>> + reg =3D <0x60>; >>>>> + #address-cells =3D <1>; >>>>> + #size-cells =3D <0>; >>>>> + gpio-controller; >>>>> + #gpio-cells =3D <2>; >>>>> + >>>>> + gpio-line-names =3D >>>>> + "", >>>>> + "APSS_RESET_N", >>>>> + "", "", "", "", >>>>> + "P10_DCM0_PRES", >>>>> + "P10_DCM1_PRES", >>>>> + "", "", >>>>> + "N_MODE_CPU_N", >>>>> + "", >>>>> + "PRESENT_VRM_DCM0_N", >>>>> + "PRESENT_VRM_DCM1_N", >>>>> + "N_MODE_VREF", >>>>=20 >>>> Should any (all?) of these names be documented? >>>>=20 >>>>=20 >> INVALID URI REMOVED >> mc_docs_blob_master_designs_device-2Dtree-2Dgpio-2Dnaming.md&d=3DDwIFaQ >> &c=3Djf_iaSHvJObTbx-siA1ZOg&r=3Dbvv7AJEECoRKBU02rcu4F5DWd-EwX8As2xrXeO9ZS >> o4&m=3DJzmffOJA0hX_vgi3n0P-A6l60imZToV7q1U2W2h6xt4&s=3D14_ACuQWMp-IFlhLQa >> ejLVBN8XVgDnn1_l6336-FBG8&e=3D=20 >>>=20 >>> Not sure. Seems the openbmc doc is documenting the gpios for >>> gpiochip0 only? >=20 >> AIUI the document is for GPIOs that are exposed to userspace. >>=20 >> It doesn't matter where they're coming from. If they are going to be >> used by a libgpio application, they need to have names, and the names >> should be documented where possible. >>=20 >=20 > I agree which gpiochip is just a board wiring consideration and has=20 > no bearing on the documentation. >=20 > However, in the introductory sections in the document clearly says=20 > the purpose is to establish naming for common (function) GPIOs, and > the justification is by using consistent names across machines code=20 > will be able to be reused with little to no configuration. In=20 > addition it mentions "common" GPIOs must be added to the document in=20 > the future. So an evaluation should be made to the likelihood that=20 > such code reuse can be anticipated. >=20 > Most of the names added in this patch are presence detect signals used > to cross check VPD is read into inventory. I'd expect any such uses to > be configured in an inventory config file listing the name and where the > FRU appears in the Dbus or Redfish model. I'd argue the names for any=20 > such gpio would be beyond the present document scope. >=20 > The one mentioned in the changelog, N_MODE_VREF, is intended to=20 > be relayed to the OCC, basically a power management controller in > common in POWER processor chips. I can see an argument to list this, > but feel it would be in the OpenPOWER specific section unless the=20 > activation method is exposed in some method that would be common=20 > to other chipsets. Thanks. I submitted a proposal to define N_MODE_VREF: https://gerrit.openbm= c-project.xyz/c/openbmc/docs/+/46914 Once the name is approved I=E2=80=99ll add just that one to the device tree= , since the others are not going to be used. >=20 >> ...documented in the openbmc design >> doc, such as SLOT6_PRSNT_EN_RSVD, SLOT11_EXPANDER_PRSNT_N, etc. >>=20 >> They should be fixed, if possible. >=20 > The scope is clearly use reusable names going forward. The technical > debt from past naming can be brought down as new uses are added but > we are not renaming every GPIO in every existing platform, and we don't > have the review bandwidth to agree on common names should be added for > all existing signals. >=20 > milton --Apple-Mail=_F225E0ED-03A6-423F-BB15-CA369B1C4DC6 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: quoted-printable

On Sep 15, 20= 21, at 12:15 AM, Milton Miller II <miltonm@us.ibm.com> wrote:

On = September 14, 2021, Joel Stanley wrote:
On Tue, 14 Sept 2021 at 20:46, Adriana Kobylak &l= t;anoo@linux.ibm.com&g= t;
wrote:
=
On Sep 14, 2021, at 3:49 AM, Joel Stan= ley <joel@jms.id.au>= wrote:
On Fri, 10 Sept 2021 at 19:54, Adriana Kobylak
<anoo@linux.ibm= .com> wrote:

From: Adriana Kobylak <anoo@us.ibm.com>

The N_MODE_VRE= F gpio is designed to be used to specify how many
power
supplies the system should have (2 or 4).  If enough powersupplies fail
so that the system no longer has re= dundancy (no longer n+1), the
hardware will signal to the Onb= oard Chip Controller that the
system may
be ove= rsubscribed, and performance may need to be reduced so the
sy= stem
can maintain it's powered on state. This gpio is on a 95= 52,
populate all
the gpios on that chip for com= pleteness.

Signed-off-by: Adriana Kobylak <= anoo@us.ibm.com>
---

v2: Update commit message.

arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 103
+++++++++++++++++++
1 file changed, 103 insertio= ns(+)

diff --git a/arch/arm/boot/dts/aspeed-bm= c-ibm-rainier.dts
b/ar= ch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 6fd3ddf97a21..d5eea86dc260 100644
= --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch= /arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -1502,6 +1502,109= @@ eeprom@51 {
       &nb= sp;      reg =3D <0x51>;
=       };

+  = ;     pca_pres3: pca9552@60 {
+ &nbs= p;            &= nbsp;compatible =3D "nxp,pca9552";
+     =           reg =3D <0x6= 0>;
+         &nbs= p;     #address-cells =3D <1>;
+             =   #size-cells =3D <0>;
+    &n= bsp;          gpio-contro= ller;
+          = ;     #gpio-cells =3D <2>;
++           =     gpio-line-names =3D
+   &nb= sp;            =        "",
+   &= nbsp;           &nbs= p;       "APSS_RESET_N",
+=             &n= bsp;         "", "", "", "",+           =             "P1= 0_DCM0_PRES",
+        &nb= sp;            =   "P10_DCM1_PRES",
+      =             &nb= sp;    "", "",
+     =             &nb= sp;     "N_MODE_CPU_N",
+  &nbs= p;            &= nbsp;       "",
+  &n= bsp;            = ;        "PRESENT_VRM_DCM0_N",
+           &nb= sp;           "PRESE= NT_VRM_DCM1_N",
+        &= nbsp;           &nbs= p;  "N_MODE_VREF",

Shou= ld any (all?) of these names be documented?

INVALID URI REMOVED
mc_docs_blob_master_designs_de= vice-2Dtree-2Dgpio-2Dnaming.md&d=3DDwIFaQ
&c=3Djf_iaS= HvJObTbx-siA1ZOg&r=3Dbvv7AJEECoRKBU02rcu4F5DWd-EwX8As2xrXeO9ZS
o4&m=3DJzmffOJA0hX_vgi3n0P-A6l60imZToV7q1U2W2h6xt4&s=3D14_ACu= QWMp-IFlhLQa
ejLVBN8XVgDnn1_l6336-FBG8&e=3D 

Not sure. Seems the openbmc doc is documenting= the gpios for
gpiochip0 only?

AIUI the d= ocument is for GPIOs that are exposed to userspace.

It doesn't matter where they're coming from. If they are going to be<= br class=3D"">used by a libgpio application, they need to have names, and t= he names
should be documented where possible.
<= br class=3D"">

I agre= e which gpiochip is just a board wiring consideration and has 
no bearing on the documentation.

However, in the intro= ductory sections in the document clearly says 
the p= urpose is to establish naming for common (function) GPIOs, and
the justification is by using consisten= t names across machines code 
will be able to be reu= sed with little to no configuration.  In 
addit= ion it mentions "common" GPIOs must be added to the document in 
the future.  So an evaluation should be made to the like= lihood that 
such code reuse can be anticipated.

Most of the names added in this patch are presence detect signals us= ed
to cross check VPD is re= ad into inventory.   I'd expect any such uses to
be configured in an inventory config file = listing the name and where the
<= span style=3D"caret-color: rgb(0, 0, 0); font-family: Verdana; font-size: 1= 2px; font-style: normal; font-variant-caps: normal; font-weight: normal; le= tter-spacing: normal; text-align: start; text-indent: 0px; text-transform: = none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0p= x; text-decoration: none; float: none; display: inline !important;" class= =3D"">FRU appears in the Dbus or Redfish model.  I'd argue the names f= or any 

such gpio would be beyond the present docu= ment scope.

The one mentioned in the changelog, N_MODE_VREF, is i= ntended to 
be relayed to the OCC, basically a power= management controller in
c= ommon in POWER processor chips.  I can see an argument to list this,
but feel it would be in the = OpenPOWER specific section unless the=  
activation me= thod is exposed in some method that would be common 
to other chipsets.


Thanks. I submitted a proposal to def= ine N_MODE_VREF: https://gerrit.openbmc-project.xyz/c/openbmc/docs/+/= 46914
Once the name is approved I=E2=80=99ll add just that on= e to the device tree, since the others are not going to be used.


...documented in the openbmc des= ign
doc, such as SLOT6_PRSNT_EN_RSVD, SLOT11_EXPANDER_PRSNT_N= , etc.

They should be fixed, if possible.

The scope = is clearly use reusable names going forward.  The technical
debt from past naming can be brought = down as new uses are added but
<= span style=3D"caret-color: rgb(0, 0, 0); font-family: Verdana; font-size: 1= 2px; font-style: normal; font-variant-caps: normal; font-weight: normal; le= tter-spacing: normal; text-align: start; text-indent: 0px; text-transform: = none; white-space: normal; word-spacing: 0px; -webkit-text-stroke-width: 0p= x; text-decoration: none; float: none; display: inline !important;" class= =3D"">we are not renaming every GPIO in every existing platform, and we don= 't
have the review bandwidt= h to agree on common names should be added for
all existing signals.

milton

= --Apple-Mail=_F225E0ED-03A6-423F-BB15-CA369B1C4DC6--