From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Authentication-Results: lists.ozlabs.org; spf=permerror (mailfrom) smtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57; helo=gate.crashing.org; envelope-from=benh@kernel.crashing.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kernel.crashing.org Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 41WzBf0YKXzDqC8 for ; Fri, 20 Jul 2018 14:56:57 +1000 (AEST) Received: from localhost (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.14.1) with ESMTP id w6K4uDrj014252; Thu, 19 Jul 2018 23:56:15 -0500 Message-ID: <483b76bac7cb8043d9d780d5ffa5e43438279887.camel@kernel.crashing.org> Subject: Re: [RFC PATCH v2 1/4] dt-bindings: misc: Add bindings for misc. BMC control fields From: Benjamin Herrenschmidt To: Andrew Jeffery , Rob Herring , Eugene.Cho@dell.com, a.amelkin@yadro.com Cc: Mark Rutland , devicetree@vger.kernel.org, Greg Kroah-Hartman , linux-kernel@vger.kernel.org, Joel Stanley , stewart@linux.ibm.com, OpenBMC Maillist , linux-arm-kernel@lists.infradead.org Date: Fri, 20 Jul 2018 14:56:13 +1000 In-Reply-To: <1532045276.1219110.1446722072.546C1F9D@webmail.messagingengine.com> References: <20180711053122.30773-1-andrew@aj.id.au> <20180711053122.30773-2-andrew@aj.id.au> <20180711200450.GB17291@rob-hp-laptop> <1531356830.3551458.1437853280.551CA8C5@webmail.messagingengine.com> <1531463489.747186.1439263128.075AECE1@webmail.messagingengine.com> <1531967302.2140539.1445583600.0F5ED287@webmail.messagingengine.com> <9787b471abc49c0b3db60e3471473a7a5b45ade7.camel@kernel.crashing.org> <1532045276.1219110.1446722072.546C1F9D@webmail.messagingengine.com> Content-Type: text/plain; charset="UTF-8" X-Mailer: Evolution 3.28.3 (3.28.3-1.fc28) Mime-Version: 1.0 Content-Transfer-Encoding: 7bit X-BeenThere: openbmc@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Development list for OpenBMC List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Jul 2018 04:56:58 -0000 On Fri, 2018-07-20 at 09:37 +0930, Andrew Jeffery wrote: > > > > Andrew, can you start with a list that shows what you expect us to need > > on our systems ? > > > > Okay, our Witherspoon and Romulus platforms containing the ASPEED AST2500 currently need the following tuneables exposed: > > > From the SCU: > > - Debug UART enable > - VGA DAC mux > - VGA scratch registers 0-7 > - LPC SuperIO decode enable > - VGA MMIO decode enable > > > From the LPC controller: > > - iLPC2AHB enable > - SuperIO scratch registers 0x20-0x2f > > (The LPC controller is just as much of a collection of random bits as the SCU) > > Lastly, our Palmetto platform uses an AST2400 which has fewer features compared to the AST2500. Its tuneable list is the same as the above with the exception of "Debug UART enable". > > Tuneables that we may need to expose in the future include: > > > From the SCU: > > - PCI VID/DID for the BMC PCIe device > - VGA device enable (may need to be disabled if the platform contains a discrete graphics processor) Additionally there's a bunch of resigters controlling the mapping of various MMIO regions of the BMC PCIe device to portions of the BMC address space. I'm not sure what's the best way to handle that. This specific set might require a dedicated device as a subnode of the SCU in the DT that contains all the mappings as properties... That or we consider them static enough and just whack it in u-boot. > > From the LPC controller: > > - UART mux > > Alexander, Eugene, can you chime in with your platforms' needs? > > Cheers, > > Andrew