From: Jeremy Kerr <email@example.com> To: ChiaWei Wang <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org>, "email@example.com" <firstname.lastname@example.org> Cc: Morris Mao <email@example.com>, Ryan Chen <firstname.lastname@example.org> Subject: Re: [PATCH v4 3/4] soc: aspeed: Add eSPI driver Date: Thu, 09 Sep 2021 09:52:43 +0800 [thread overview] Message-ID: <email@example.com> (raw) In-Reply-To: <HK0PR06MB377924CFCBFE9BD40E1C4A5D91D49@HK0PR06MB3779.apcprd06.prod.outlook.com> Hi Chiawei, > Yes, there is security concern using HW mode. > Our designer is considering to remove the HW mode support in the next > generation of Aspeed SoCs. > So far we haven't encountered a scenario demanding HW mode. Great to hear :) can we unconditionally set ESPI000 in the driver then? > > With than in mind, if we're disabling hardware mode - what does the > > direction control setting effect when we're in software mode > > (ESPICTRL == 1)? Does it even matter? > > Yes, the direction matters even in SW mode. > When the direction is 'master-to-slave' and the GPIO value is updated > by the Host through PUT_VW, a VW interrupt is trigger to notify BMC. > For the 'slave-to-master' GPIO, a alert is generated to notify the > Host to issue GET_VW for the GPIO value updated by the BMC by > ESPI09C. OK, but the datasheet mentions that ESPICFG804 is only applicable when ESPI000 = 0, or is that not the case? But based on what you've said: yes, it sounds like the generic gpiodev parts won't be useful for this. > > Separate from this: I'm also proposing that we represent the system > > event VWs > > as gpiodevs as well. > > > > > A raw packet, primitive interface should have better flexibility > > > to > > > manage MCTP packets over the OOB channel. > > > > OK, let me phrase this differently: can the OOB channel be used for > > anything other than SMBus messaging? Is it useful to provide an > > interface that isn't a standard SMBus/i2c device? > > Yes, the PCH spec. also defines two additional packet format for an > eSPI slave to retrieve PCH Temperature Data and RTC time. > It should be trivial to prepare a byte buffer in that format and send > it through the raw packet interface. OK, understood. > > If you need custom uapi definitions for this driver, that might be > > okay, but it's going to be more work for you (to define an interface > > that can be supported long-term), rather than using standard > > infrastructure that already exists. > > Thus I suggested that we can refer to the IPMI KCS BMC driver, which > supports the selection of different user interfaces, RAW or IPMI. Yep, but the KCS "raw" register set is standardised as part of the IPMI spec too, which helps to define a stable user API. We don't have that in this case. Overall though, if you want to start with the "low-level" API, then introduce "enhanced" functionality - like an actual SMBus driver - alongside that, then that sounds like an OK approach. > If IOCTL is considered to be not user friendly or magic code > polluting, file-based read/write on the miscdevice node is also an > option. It's not really my decision to make, but a read/write event interface would seem to be more consistent to me. Is there an obvious event format that would be common across all channels, perhaps? We'd probably also need a poll too - to make use of incoming events, like master-to-slave VW changes, perhaps? Cheers, Jeremy
next prev parent reply other threads:[~2021-09-09 1:53 UTC|newest] Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-09-01 3:30 [PATCH v4 0/4] arm: aspeed: Add eSPI support Chia-Wei Wang 2021-09-01 3:30 ` [PATCH v4 1/4] dt-bindings: aspeed: Add eSPI controller Chia-Wei Wang 2021-09-01 3:30 ` [PATCH v4 2/4] MAINTAINER: Add ASPEED eSPI driver entry Chia-Wei Wang 2021-09-01 3:30 ` [PATCH v4 3/4] soc: aspeed: Add eSPI driver Chia-Wei Wang 2021-09-02 3:29 ` Jeremy Kerr 2021-09-02 6:44 ` ChiaWei Wang 2021-09-02 7:04 ` Jeremy Kerr 2021-09-06 1:19 ` ChiaWei Wang 2021-09-06 3:16 ` Jeremy Kerr 2021-09-08 9:16 ` ChiaWei Wang 2021-09-09 1:52 ` Jeremy Kerr [this message] 2021-09-10 3:23 ` ChiaWei Wang 2021-09-01 3:30 ` [PATCH v4 4/4] ARM: dts: aspeed: Add eSPI node Chia-Wei Wang 2021-11-10 11:21 ` Andrei Kartashev 2021-11-11 1:55 ` ChiaWei Wang
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