openbmc.lists.ozlabs.org archive mirror
 help / color / mirror / Atom feed
* [PATCH v2 0/3] arm: aspeed: Add UART routing support
@ 2021-09-02  2:18 Chia-Wei Wang
  2021-09-02  2:18 ` [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Chia-Wei Wang
                   ` (5 more replies)
  0 siblings, 6 replies; 15+ messages in thread
From: Chia-Wei Wang @ 2021-09-02  2:18 UTC (permalink / raw)
  To: robh+dt, joel, andrew, lee.jones, osk, devicetree,
	linux-arm-kernel, linux-aspeed, linux-kernel, openbmc

Add UART routing driver and the device tree nodes.

v2:
 - Add dt-bindings
 - Add ABI documents for the exported sysfs interface
 - Revise driver implementation suggested by Joel

Chia-Wei Wang (3):
  dt-bindings: aspeed-lpc: Add UART routing compatible string
  soc: aspeed: Add UART routing support
  ARM: dts: aspeed: Add uart routing to device tree

 .../testing/sysfs-driver-aspeed-uart-routing  |  15 +
 .../devicetree/bindings/mfd/aspeed-lpc.txt    |  22 +
 arch/arm/boot/dts/aspeed-g5.dtsi              |   6 +
 arch/arm/boot/dts/aspeed-g6.dtsi              |   6 +
 drivers/soc/aspeed/Kconfig                    |  10 +
 drivers/soc/aspeed/Makefile                   |   9 +-
 drivers/soc/aspeed/aspeed-uart-routing.c      | 601 ++++++++++++++++++
 7 files changed, 665 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
 create mode 100644 drivers/soc/aspeed/aspeed-uart-routing.c

-- 
2.17.1


^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string
  2021-09-02  2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang
@ 2021-09-02  2:18 ` Chia-Wei Wang
  2021-09-07 18:46   ` Rob Herring
  2021-09-02  2:18 ` [PATCH v2 2/3] soc: aspeed: Add LPC UART routing support Chia-Wei Wang
                   ` (4 subsequent siblings)
  5 siblings, 1 reply; 15+ messages in thread
From: Chia-Wei Wang @ 2021-09-02  2:18 UTC (permalink / raw)
  To: robh+dt, joel, andrew, lee.jones, osk, devicetree,
	linux-arm-kernel, linux-aspeed, linux-kernel, openbmc

Add the compatible string and the device tree description for the
Aspeed AST25xx/AST26xx UART routing control.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 .../devicetree/bindings/mfd/aspeed-lpc.txt    | 22 +++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
index 936aa108eab4..45d44f812e5e 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
@@ -155,3 +155,25 @@ lpc_reset: reset-controller@98 {
         reg = <0x98 0x4>;
         #reset-cells = <1>;
 };
+
+UART routing control
+--------------------
+
+The UART routing control manages the RX muxes among the UART controllers
+and the I/O pins. This is typicall used for the Serial-Over-Lan (SOL)
+service.
+
+Required properties:
+
+ - compatible:		One of:
+			"aspeed,ast2500-uart-routing";
+			"aspeed,ast2600-uart-routing";
+
+ - reg:			offset and length of the IP in the LPC memory region
+
+Example:
+
+uart_routing: uart-routing@98 {
+	compatible = "aspeed,ast2600-uart-routing";
+	reg = <0x98 0x8>;
+};
-- 
2.17.1


^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH v2 2/3] soc: aspeed: Add LPC UART routing support
  2021-09-02  2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang
  2021-09-02  2:18 ` [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Chia-Wei Wang
@ 2021-09-02  2:18 ` Chia-Wei Wang
  2021-09-02  2:25   ` ChiaWei Wang
  2021-09-02  2:18 ` [PATCH v2 2/3] soc: aspeed: Add " Chia-Wei Wang
                   ` (3 subsequent siblings)
  5 siblings, 1 reply; 15+ messages in thread
From: Chia-Wei Wang @ 2021-09-02  2:18 UTC (permalink / raw)
  To: robh+dt, joel, andrew, lee.jones, osk, devicetree,
	linux-arm-kernel, linux-aspeed, linux-kernel, openbmc

Add driver support for the LPC UART routing control. Users can perform
runtime configuration of the RX muxes among the UART controllers and the
UART IO pins.

A sysfs interface is also exported for the convenience of routing paths
check and configuration.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 .../testing/sysfs-driver-aspeed-uart-routing  |  15 +
 drivers/soc/aspeed/Kconfig                    |  10 +
 drivers/soc/aspeed/Makefile                   |   9 +-
 drivers/soc/aspeed/aspeed-uart-routing.c      | 601 ++++++++++++++++++
 4 files changed, 631 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
 create mode 100644 drivers/soc/aspeed/aspeed-uart-routing.c

diff --git a/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing b/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
new file mode 100644
index 000000000000..65f899f1f055
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
@@ -0,0 +1,15 @@
+What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/uart*
+Date:		September 2021
+Contact:	Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+Description:	Selects the RX source of the UARTx device. The current
+		selection will be marked with the '[]' brackets.
+Users:		OpenBMC.  Proposed changes should be mailed to
+		openbmc@lists.ozlabs.org
+
+What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/io*
+Date:		September 2021
+Contact:	Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+Description:	Selects the RX source of IOx pins. The current selection
+		will be marked with the '[]' brackets.
+Users:		OpenBMC.  Proposed changes should be mailed to
+		openbmc@lists.ozlabs.org
diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
index 243ca196e6ad..f579ee0b5afa 100644
--- a/drivers/soc/aspeed/Kconfig
+++ b/drivers/soc/aspeed/Kconfig
@@ -24,6 +24,16 @@ config ASPEED_LPC_SNOOP
 	  allows the BMC to listen on and save the data written by
 	  the host to an arbitrary LPC I/O port.
 
+config ASPEED_UART_ROUTING
+	tristate "ASPEED uart routing control"
+	select REGMAP
+	select MFD_SYSCON
+	default ARCH_ASPEED
+	help
+	  Provides a driver to control the UART routing paths, allowing
+	  users to perform runtime configuration of the RX muxes among
+	  the UART controllers and I/O pins.
+
 config ASPEED_P2A_CTRL
 	tristate "ASPEED P2A (VGA MMIO to BMC) bridge control"
 	select REGMAP
diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile
index fcab7192e1a4..b35d74592964 100644
--- a/drivers/soc/aspeed/Makefile
+++ b/drivers/soc/aspeed/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_ASPEED_LPC_CTRL)	+= aspeed-lpc-ctrl.o
-obj-$(CONFIG_ASPEED_LPC_SNOOP)	+= aspeed-lpc-snoop.o
-obj-$(CONFIG_ASPEED_P2A_CTRL)	+= aspeed-p2a-ctrl.o
-obj-$(CONFIG_ASPEED_SOCINFO)	+= aspeed-socinfo.o
+obj-$(CONFIG_ASPEED_LPC_CTRL)		+= aspeed-lpc-ctrl.o
+obj-$(CONFIG_ASPEED_LPC_SNOOP)		+= aspeed-lpc-snoop.o
+obj-$(CONFIG_ASPEED_UART_ROUTING)	+= aspeed-uart-routing.o
+obj-$(CONFIG_ASPEED_P2A_CTRL)		+= aspeed-p2a-ctrl.o
+obj-$(CONFIG_ASPEED_SOCINFO)		+= aspeed-socinfo.o
diff --git a/drivers/soc/aspeed/aspeed-uart-routing.c b/drivers/soc/aspeed/aspeed-uart-routing.c
new file mode 100644
index 000000000000..eba6dfebb54f
--- /dev/null
+++ b/drivers/soc/aspeed/aspeed-uart-routing.c
@@ -0,0 +1,601 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2018 Google LLC
+ * Copyright (c) 2021 Aspeed Technology Inc.
+ */
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/platform_device.h>
+
+/* register offsets */
+#define HICR9	0x98
+#define HICRA	0x9c
+
+/* attributes options */
+#define UART_ROUTING_IO1	"io1"
+#define UART_ROUTING_IO2	"io2"
+#define UART_ROUTING_IO3	"io3"
+#define UART_ROUTING_IO4	"io4"
+#define UART_ROUTING_IO5	"io5"
+#define UART_ROUTING_IO6	"io6"
+#define UART_ROUTING_IO10	"io10"
+#define UART_ROUTING_UART1	"uart1"
+#define UART_ROUTING_UART2	"uart2"
+#define UART_ROUTING_UART3	"uart3"
+#define UART_ROUTING_UART4	"uart4"
+#define UART_ROUTING_UART5	"uart5"
+#define UART_ROUTING_UART6	"uart6"
+#define UART_ROUTING_UART10	"uart10"
+#define UART_ROUTING_RES	"reserved"
+
+struct aspeed_uart_routing {
+	struct regmap *map;
+	struct attribute_group const *attr_grp;
+};
+
+struct aspeed_uart_routing_selector {
+	struct device_attribute	dev_attr;
+	uint8_t reg;
+	uint8_t mask;
+	uint8_t shift;
+	const char *const options[];
+};
+
+#define to_routing_selector(_dev_attr)					\
+	container_of(_dev_attr, struct aspeed_uart_routing_selector, dev_attr)
+
+static ssize_t aspeed_uart_routing_show(struct device *dev,
+					struct device_attribute *attr,
+					char *buf);
+
+static ssize_t aspeed_uart_routing_store(struct device *dev,
+					 struct device_attribute *attr,
+					 const char *buf, size_t count);
+
+#define ROUTING_ATTR(_name) {					\
+	.attr = {.name = _name,					\
+		 .mode = VERIFY_OCTAL_PERMISSIONS(0644) },	\
+	.show = aspeed_uart_routing_show,			\
+	.store = aspeed_uart_routing_store,			\
+}
+
+/* routing selector for AST25xx */
+static struct aspeed_uart_routing_selector ast2500_io6_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO6),
+	.reg = HICR9,
+	.shift = 8,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO5,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart5_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART5),
+	.reg = HICRA,
+	.shift = 28,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_IO5,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART4),
+	.reg = HICRA,
+	.shift = 25,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO6,
+		    NULL,
+	},
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART3),
+	.reg = HICRA,
+	.shift = 22,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART2),
+	.reg = HICRA,
+	.shift = 19,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART1),
+	.reg = HICRA,
+	.shift = 16,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io5_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO5),
+	.reg = HICRA,
+	.shift = 12,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO4),
+	.reg = HICRA,
+	.shift = 9,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO3),
+	.reg = HICRA,
+	.shift = 6,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO2),
+	.reg = HICRA,
+	.shift = 3,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO1),
+	.reg = HICRA,
+	.shift = 0,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct attribute *ast2500_uart_routing_attrs[] = {
+	&ast2500_io6_sel.dev_attr.attr,
+	&ast2500_uart5_sel.dev_attr.attr,
+	&ast2500_uart4_sel.dev_attr.attr,
+	&ast2500_uart3_sel.dev_attr.attr,
+	&ast2500_uart2_sel.dev_attr.attr,
+	&ast2500_uart1_sel.dev_attr.attr,
+	&ast2500_io5_sel.dev_attr.attr,
+	&ast2500_io4_sel.dev_attr.attr,
+	&ast2500_io3_sel.dev_attr.attr,
+	&ast2500_io2_sel.dev_attr.attr,
+	&ast2500_io1_sel.dev_attr.attr,
+	NULL,
+};
+
+static const struct attribute_group ast2500_uart_routing_attr_group = {
+	.attrs = ast2500_uart_routing_attrs,
+};
+
+/* routing selector for AST26xx */
+static struct aspeed_uart_routing_selector ast2600_uart10_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART10),
+	.reg = HICR9,
+	.shift = 12,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_IO10,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+			UART_ROUTING_RES,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io10_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO10),
+	.reg = HICR9,
+	.shift = 8,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+			UART_ROUTING_RES,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+			UART_ROUTING_RES,
+		    UART_ROUTING_UART10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART4),
+	.reg = HICRA,
+	.shift = 25,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO10,
+		    NULL,
+	},
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART3),
+	.reg = HICRA,
+	.shift = 22,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART2),
+	.reg = HICRA,
+	.shift = 19,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART1),
+	.reg = HICRA,
+	.shift = 16,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO4),
+	.reg = HICRA,
+	.shift = 9,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO3),
+	.reg = HICRA,
+	.shift = 6,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO2),
+	.reg = HICRA,
+	.shift = 3,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO1),
+	.reg = HICRA,
+	.shift = 0,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct attribute *ast2600_uart_routing_attrs[] = {
+	&ast2600_uart10_sel.dev_attr.attr,
+	&ast2600_io10_sel.dev_attr.attr,
+	&ast2600_uart4_sel.dev_attr.attr,
+	&ast2600_uart3_sel.dev_attr.attr,
+	&ast2600_uart2_sel.dev_attr.attr,
+	&ast2600_uart1_sel.dev_attr.attr,
+	&ast2600_io4_sel.dev_attr.attr,
+	&ast2600_io3_sel.dev_attr.attr,
+	&ast2600_io2_sel.dev_attr.attr,
+	&ast2600_io1_sel.dev_attr.attr,
+	NULL,
+};
+
+static const struct attribute_group ast2600_uart_routing_attr_group = {
+	.attrs = ast2600_uart_routing_attrs,
+};
+
+static ssize_t aspeed_uart_routing_show(struct device *dev,
+					struct device_attribute *attr,
+					char *buf)
+{
+	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
+	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
+	int val, pos, len;
+
+	regmap_read(uart_routing->map, sel->reg, &val);
+	val = (val >> sel->shift) & sel->mask;
+
+	len = 0;
+	for (pos = 0; sel->options[pos] != NULL; ++pos) {
+		if (pos == val)
+			len += sysfs_emit_at(buf, len, "[%s] ", sel->options[pos]);
+		else
+			len += sysfs_emit_at(buf, len, "%s ", sel->options[pos]);
+	}
+
+	if (val >= pos)
+		len += sysfs_emit_at(buf, len, "[unknown(%d)]", val);
+
+	len += sysfs_emit_at(buf, len, "\n");
+
+	return len;
+}
+
+static ssize_t aspeed_uart_routing_store(struct device *dev,
+					 struct device_attribute *attr,
+					 const char *buf, size_t count)
+{
+	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
+	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
+	int val;
+
+	val = match_string(sel->options, -1, buf);
+	if (val < 0) {
+		dev_err(dev, "invalid value \"%s\"\n", buf);
+		return -EINVAL;
+	}
+
+	regmap_update_bits(uart_routing->map, sel->reg,
+			(sel->mask << sel->shift),
+			(val & sel->mask) << sel->shift);
+
+	return count;
+}
+
+static int aspeed_uart_routing_probe(struct platform_device *pdev)
+{
+	int rc;
+	struct device *dev = &pdev->dev;
+	struct aspeed_uart_routing *uart_routing;
+
+	uart_routing = devm_kzalloc(&pdev->dev, sizeof(*uart_routing), GFP_KERNEL);
+	if (!uart_routing)
+		return -ENOMEM;
+
+	uart_routing->map = syscon_node_to_regmap(dev->parent->of_node);
+	if (IS_ERR(uart_routing->map)) {
+		dev_err(dev, "cannot get regmap\n");
+		return PTR_ERR(uart_routing->map);
+	}
+
+	uart_routing->attr_grp = of_device_get_match_data(dev);
+
+	rc = sysfs_create_group(&dev->kobj, uart_routing->attr_grp);
+	if (rc < 0)
+		return rc;
+
+	dev_set_drvdata(dev, uart_routing);
+
+	dev_info(dev, "module loaded\n");
+
+	return 0;
+}
+
+static int aspeed_uart_routing_remove(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct aspeed_uart_routing *uart_routing = platform_get_drvdata(pdev);
+
+	sysfs_remove_group(&dev->kobj, uart_routing->attr_grp);
+
+	return 0;
+}
+
+static const struct of_device_id aspeed_uart_routing_table[] = {
+	{ .compatible = "aspeed,ast2500-uart-routing",
+	  .data = &ast2500_uart_routing_attr_group },
+	{ .compatible = "aspeed,ast2600-uart-routing",
+	  .data = &ast2600_uart_routing_attr_group },
+	{ },
+};
+
+static struct platform_driver aspeed_uart_routing_driver = {
+	.driver = {
+		.name = "aspeed-uart-routing",
+		.of_match_table = aspeed_uart_routing_table,
+	},
+	.probe = aspeed_uart_routing_probe,
+	.remove = aspeed_uart_routing_remove,
+};
+
+module_platform_driver(aspeed_uart_routing_driver);
+
+MODULE_AUTHOR("Oskar Senft <osk@google.com>");
+MODULE_AUTHOR("Chia-Wei Wang <chiawei_wang@aspeedtech.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Driver to configure Aspeed UART routing");
-- 
2.17.1


^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH v2 2/3] soc: aspeed: Add UART routing support
  2021-09-02  2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang
  2021-09-02  2:18 ` [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Chia-Wei Wang
  2021-09-02  2:18 ` [PATCH v2 2/3] soc: aspeed: Add LPC UART routing support Chia-Wei Wang
@ 2021-09-02  2:18 ` Chia-Wei Wang
  2021-09-02  2:18 ` [PATCH v2 3/3] ARM: dts: aspeed: Add uart routing to device tree Chia-Wei Wang
                   ` (2 subsequent siblings)
  5 siblings, 0 replies; 15+ messages in thread
From: Chia-Wei Wang @ 2021-09-02  2:18 UTC (permalink / raw)
  To: robh+dt, joel, andrew, lee.jones, osk, devicetree,
	linux-arm-kernel, linux-aspeed, linux-kernel, openbmc

Add driver support for the UART routing control. Users can perform
runtime configuration of the RX muxes among the UART controllers and
the UART IO pins.

The sysfs interface is also exported for the convenience of routing paths
check and update.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 .../testing/sysfs-driver-aspeed-uart-routing  |  15 +
 drivers/soc/aspeed/Kconfig                    |  10 +
 drivers/soc/aspeed/Makefile                   |   9 +-
 drivers/soc/aspeed/aspeed-uart-routing.c      | 601 ++++++++++++++++++
 4 files changed, 631 insertions(+), 4 deletions(-)
 create mode 100644 Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
 create mode 100644 drivers/soc/aspeed/aspeed-uart-routing.c

diff --git a/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing b/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
new file mode 100644
index 000000000000..65f899f1f055
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
@@ -0,0 +1,15 @@
+What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/uart*
+Date:		September 2021
+Contact:	Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+Description:	Selects the RX source of the UARTx device. The current
+		selection will be marked with the '[]' brackets.
+Users:		OpenBMC.  Proposed changes should be mailed to
+		openbmc@lists.ozlabs.org
+
+What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/io*
+Date:		September 2021
+Contact:	Chia-Wei Wang <chiawei_wang@aspeedtech.com>
+Description:	Selects the RX source of IOx pins. The current selection
+		will be marked with the '[]' brackets.
+Users:		OpenBMC.  Proposed changes should be mailed to
+		openbmc@lists.ozlabs.org
diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig
index 243ca196e6ad..f579ee0b5afa 100644
--- a/drivers/soc/aspeed/Kconfig
+++ b/drivers/soc/aspeed/Kconfig
@@ -24,6 +24,16 @@ config ASPEED_LPC_SNOOP
 	  allows the BMC to listen on and save the data written by
 	  the host to an arbitrary LPC I/O port.
 
+config ASPEED_UART_ROUTING
+	tristate "ASPEED uart routing control"
+	select REGMAP
+	select MFD_SYSCON
+	default ARCH_ASPEED
+	help
+	  Provides a driver to control the UART routing paths, allowing
+	  users to perform runtime configuration of the RX muxes among
+	  the UART controllers and I/O pins.
+
 config ASPEED_P2A_CTRL
 	tristate "ASPEED P2A (VGA MMIO to BMC) bridge control"
 	select REGMAP
diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile
index fcab7192e1a4..b35d74592964 100644
--- a/drivers/soc/aspeed/Makefile
+++ b/drivers/soc/aspeed/Makefile
@@ -1,5 +1,6 @@
 # SPDX-License-Identifier: GPL-2.0-only
-obj-$(CONFIG_ASPEED_LPC_CTRL)	+= aspeed-lpc-ctrl.o
-obj-$(CONFIG_ASPEED_LPC_SNOOP)	+= aspeed-lpc-snoop.o
-obj-$(CONFIG_ASPEED_P2A_CTRL)	+= aspeed-p2a-ctrl.o
-obj-$(CONFIG_ASPEED_SOCINFO)	+= aspeed-socinfo.o
+obj-$(CONFIG_ASPEED_LPC_CTRL)		+= aspeed-lpc-ctrl.o
+obj-$(CONFIG_ASPEED_LPC_SNOOP)		+= aspeed-lpc-snoop.o
+obj-$(CONFIG_ASPEED_UART_ROUTING)	+= aspeed-uart-routing.o
+obj-$(CONFIG_ASPEED_P2A_CTRL)		+= aspeed-p2a-ctrl.o
+obj-$(CONFIG_ASPEED_SOCINFO)		+= aspeed-socinfo.o
diff --git a/drivers/soc/aspeed/aspeed-uart-routing.c b/drivers/soc/aspeed/aspeed-uart-routing.c
new file mode 100644
index 000000000000..eba6dfebb54f
--- /dev/null
+++ b/drivers/soc/aspeed/aspeed-uart-routing.c
@@ -0,0 +1,601 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (c) 2018 Google LLC
+ * Copyright (c) 2021 Aspeed Technology Inc.
+ */
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/of_device.h>
+#include <linux/of_platform.h>
+#include <linux/mfd/syscon.h>
+#include <linux/regmap.h>
+#include <linux/platform_device.h>
+
+/* register offsets */
+#define HICR9	0x98
+#define HICRA	0x9c
+
+/* attributes options */
+#define UART_ROUTING_IO1	"io1"
+#define UART_ROUTING_IO2	"io2"
+#define UART_ROUTING_IO3	"io3"
+#define UART_ROUTING_IO4	"io4"
+#define UART_ROUTING_IO5	"io5"
+#define UART_ROUTING_IO6	"io6"
+#define UART_ROUTING_IO10	"io10"
+#define UART_ROUTING_UART1	"uart1"
+#define UART_ROUTING_UART2	"uart2"
+#define UART_ROUTING_UART3	"uart3"
+#define UART_ROUTING_UART4	"uart4"
+#define UART_ROUTING_UART5	"uart5"
+#define UART_ROUTING_UART6	"uart6"
+#define UART_ROUTING_UART10	"uart10"
+#define UART_ROUTING_RES	"reserved"
+
+struct aspeed_uart_routing {
+	struct regmap *map;
+	struct attribute_group const *attr_grp;
+};
+
+struct aspeed_uart_routing_selector {
+	struct device_attribute	dev_attr;
+	uint8_t reg;
+	uint8_t mask;
+	uint8_t shift;
+	const char *const options[];
+};
+
+#define to_routing_selector(_dev_attr)					\
+	container_of(_dev_attr, struct aspeed_uart_routing_selector, dev_attr)
+
+static ssize_t aspeed_uart_routing_show(struct device *dev,
+					struct device_attribute *attr,
+					char *buf);
+
+static ssize_t aspeed_uart_routing_store(struct device *dev,
+					 struct device_attribute *attr,
+					 const char *buf, size_t count);
+
+#define ROUTING_ATTR(_name) {					\
+	.attr = {.name = _name,					\
+		 .mode = VERIFY_OCTAL_PERMISSIONS(0644) },	\
+	.show = aspeed_uart_routing_show,			\
+	.store = aspeed_uart_routing_store,			\
+}
+
+/* routing selector for AST25xx */
+static struct aspeed_uart_routing_selector ast2500_io6_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO6),
+	.reg = HICR9,
+	.shift = 8,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO5,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart5_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART5),
+	.reg = HICRA,
+	.shift = 28,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_IO5,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART4),
+	.reg = HICRA,
+	.shift = 25,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO6,
+		    NULL,
+	},
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART3),
+	.reg = HICRA,
+	.shift = 22,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART2),
+	.reg = HICRA,
+	.shift = 19,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_uart1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART1),
+	.reg = HICRA,
+	.shift = 16,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io5_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO5),
+	.reg = HICRA,
+	.shift = 12,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO4),
+	.reg = HICRA,
+	.shift = 9,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO3),
+	.reg = HICRA,
+	.shift = 6,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO2),
+	.reg = HICRA,
+	.shift = 3,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2500_io1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO1),
+	.reg = HICRA,
+	.shift = 0,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART5,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO6,
+		    NULL,
+		    },
+};
+
+static struct attribute *ast2500_uart_routing_attrs[] = {
+	&ast2500_io6_sel.dev_attr.attr,
+	&ast2500_uart5_sel.dev_attr.attr,
+	&ast2500_uart4_sel.dev_attr.attr,
+	&ast2500_uart3_sel.dev_attr.attr,
+	&ast2500_uart2_sel.dev_attr.attr,
+	&ast2500_uart1_sel.dev_attr.attr,
+	&ast2500_io5_sel.dev_attr.attr,
+	&ast2500_io4_sel.dev_attr.attr,
+	&ast2500_io3_sel.dev_attr.attr,
+	&ast2500_io2_sel.dev_attr.attr,
+	&ast2500_io1_sel.dev_attr.attr,
+	NULL,
+};
+
+static const struct attribute_group ast2500_uart_routing_attr_group = {
+	.attrs = ast2500_uart_routing_attrs,
+};
+
+/* routing selector for AST26xx */
+static struct aspeed_uart_routing_selector ast2600_uart10_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART10),
+	.reg = HICR9,
+	.shift = 12,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_IO10,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+			UART_ROUTING_RES,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io10_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO10),
+	.reg = HICR9,
+	.shift = 8,
+	.mask = 0xf,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+			UART_ROUTING_RES,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+			UART_ROUTING_RES,
+		    UART_ROUTING_UART10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART4),
+	.reg = HICRA,
+	.shift = 25,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO10,
+		    NULL,
+	},
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART3),
+	.reg = HICRA,
+	.shift = 22,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART2),
+	.reg = HICRA,
+	.shift = 19,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_uart1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART1),
+	.reg = HICRA,
+	.shift = 16,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io4_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO4),
+	.reg = HICRA,
+	.shift = 9,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io3_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO3),
+	.reg = HICRA,
+	.shift = 6,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_IO1,
+		    UART_ROUTING_IO2,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io2_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO2),
+	.reg = HICRA,
+	.shift = 3,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct aspeed_uart_routing_selector ast2600_io1_sel = {
+	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO1),
+	.reg = HICRA,
+	.shift = 0,
+	.mask = 0x7,
+	.options = {
+		    UART_ROUTING_UART1,
+		    UART_ROUTING_UART2,
+		    UART_ROUTING_UART3,
+		    UART_ROUTING_UART4,
+		    UART_ROUTING_UART10,
+		    UART_ROUTING_IO3,
+		    UART_ROUTING_IO4,
+		    UART_ROUTING_IO10,
+		    NULL,
+		    },
+};
+
+static struct attribute *ast2600_uart_routing_attrs[] = {
+	&ast2600_uart10_sel.dev_attr.attr,
+	&ast2600_io10_sel.dev_attr.attr,
+	&ast2600_uart4_sel.dev_attr.attr,
+	&ast2600_uart3_sel.dev_attr.attr,
+	&ast2600_uart2_sel.dev_attr.attr,
+	&ast2600_uart1_sel.dev_attr.attr,
+	&ast2600_io4_sel.dev_attr.attr,
+	&ast2600_io3_sel.dev_attr.attr,
+	&ast2600_io2_sel.dev_attr.attr,
+	&ast2600_io1_sel.dev_attr.attr,
+	NULL,
+};
+
+static const struct attribute_group ast2600_uart_routing_attr_group = {
+	.attrs = ast2600_uart_routing_attrs,
+};
+
+static ssize_t aspeed_uart_routing_show(struct device *dev,
+					struct device_attribute *attr,
+					char *buf)
+{
+	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
+	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
+	int val, pos, len;
+
+	regmap_read(uart_routing->map, sel->reg, &val);
+	val = (val >> sel->shift) & sel->mask;
+
+	len = 0;
+	for (pos = 0; sel->options[pos] != NULL; ++pos) {
+		if (pos == val)
+			len += sysfs_emit_at(buf, len, "[%s] ", sel->options[pos]);
+		else
+			len += sysfs_emit_at(buf, len, "%s ", sel->options[pos]);
+	}
+
+	if (val >= pos)
+		len += sysfs_emit_at(buf, len, "[unknown(%d)]", val);
+
+	len += sysfs_emit_at(buf, len, "\n");
+
+	return len;
+}
+
+static ssize_t aspeed_uart_routing_store(struct device *dev,
+					 struct device_attribute *attr,
+					 const char *buf, size_t count)
+{
+	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
+	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
+	int val;
+
+	val = match_string(sel->options, -1, buf);
+	if (val < 0) {
+		dev_err(dev, "invalid value \"%s\"\n", buf);
+		return -EINVAL;
+	}
+
+	regmap_update_bits(uart_routing->map, sel->reg,
+			(sel->mask << sel->shift),
+			(val & sel->mask) << sel->shift);
+
+	return count;
+}
+
+static int aspeed_uart_routing_probe(struct platform_device *pdev)
+{
+	int rc;
+	struct device *dev = &pdev->dev;
+	struct aspeed_uart_routing *uart_routing;
+
+	uart_routing = devm_kzalloc(&pdev->dev, sizeof(*uart_routing), GFP_KERNEL);
+	if (!uart_routing)
+		return -ENOMEM;
+
+	uart_routing->map = syscon_node_to_regmap(dev->parent->of_node);
+	if (IS_ERR(uart_routing->map)) {
+		dev_err(dev, "cannot get regmap\n");
+		return PTR_ERR(uart_routing->map);
+	}
+
+	uart_routing->attr_grp = of_device_get_match_data(dev);
+
+	rc = sysfs_create_group(&dev->kobj, uart_routing->attr_grp);
+	if (rc < 0)
+		return rc;
+
+	dev_set_drvdata(dev, uart_routing);
+
+	dev_info(dev, "module loaded\n");
+
+	return 0;
+}
+
+static int aspeed_uart_routing_remove(struct platform_device *pdev)
+{
+	struct device *dev = &pdev->dev;
+	struct aspeed_uart_routing *uart_routing = platform_get_drvdata(pdev);
+
+	sysfs_remove_group(&dev->kobj, uart_routing->attr_grp);
+
+	return 0;
+}
+
+static const struct of_device_id aspeed_uart_routing_table[] = {
+	{ .compatible = "aspeed,ast2500-uart-routing",
+	  .data = &ast2500_uart_routing_attr_group },
+	{ .compatible = "aspeed,ast2600-uart-routing",
+	  .data = &ast2600_uart_routing_attr_group },
+	{ },
+};
+
+static struct platform_driver aspeed_uart_routing_driver = {
+	.driver = {
+		.name = "aspeed-uart-routing",
+		.of_match_table = aspeed_uart_routing_table,
+	},
+	.probe = aspeed_uart_routing_probe,
+	.remove = aspeed_uart_routing_remove,
+};
+
+module_platform_driver(aspeed_uart_routing_driver);
+
+MODULE_AUTHOR("Oskar Senft <osk@google.com>");
+MODULE_AUTHOR("Chia-Wei Wang <chiawei_wang@aspeedtech.com>");
+MODULE_LICENSE("GPL v2");
+MODULE_DESCRIPTION("Driver to configure Aspeed UART routing");
-- 
2.17.1


^ permalink raw reply	[flat|nested] 15+ messages in thread

* [PATCH v2 3/3] ARM: dts: aspeed: Add uart routing to device tree
  2021-09-02  2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang
                   ` (2 preceding siblings ...)
  2021-09-02  2:18 ` [PATCH v2 2/3] soc: aspeed: Add " Chia-Wei Wang
@ 2021-09-02  2:18 ` Chia-Wei Wang
  2021-09-08  9:42 ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Paul Fertser
  2021-09-09  6:52 ` [External] " Lei Yu
  5 siblings, 0 replies; 15+ messages in thread
From: Chia-Wei Wang @ 2021-09-02  2:18 UTC (permalink / raw)
  To: robh+dt, joel, andrew, lee.jones, osk, devicetree,
	linux-arm-kernel, linux-aspeed, linux-kernel, openbmc

Add LPC uart routing to the device tree for Aspeed AST25xx/AST26xx SoCs.

Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
---
 arch/arm/boot/dts/aspeed-g5.dtsi | 6 ++++++
 arch/arm/boot/dts/aspeed-g6.dtsi | 6 ++++++
 2 files changed, 12 insertions(+)

diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 329eaeef66fb..d3da5c948165 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -492,6 +492,12 @@
 					#reset-cells = <1>;
 				};
 
+				uart_routing: uart-routing@98 {
+					compatible = "aspeed,ast2500-uart-routing";
+					reg = <0x98 0x8>;
+					status = "disabled";
+				};
+
 				lhc: lhc@a0 {
 					compatible = "aspeed,ast2500-lhc";
 					reg = <0xa0 0x24 0xc8 0x8>;
diff --git a/arch/arm/boot/dts/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed-g6.dtsi
index f96607b7b4e2..c287d9dba118 100644
--- a/arch/arm/boot/dts/aspeed-g6.dtsi
+++ b/arch/arm/boot/dts/aspeed-g6.dtsi
@@ -523,6 +523,12 @@
 					#reset-cells = <1>;
 				};
 
+				uart_routing: uart-routing@98 {
+					compatible = "aspeed,ast2600-uart-routing";
+					reg = <0x98 0x8>;
+					status = "disabled";
+				};
+
 				ibt: ibt@140 {
 					compatible = "aspeed,ast2600-ibt-bmc";
 					reg = <0x140 0x18>;
-- 
2.17.1


^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: [PATCH v2 2/3] soc: aspeed: Add LPC UART routing support
  2021-09-02  2:18 ` [PATCH v2 2/3] soc: aspeed: Add LPC UART routing support Chia-Wei Wang
@ 2021-09-02  2:25   ` ChiaWei Wang
  0 siblings, 0 replies; 15+ messages in thread
From: ChiaWei Wang @ 2021-09-02  2:25 UTC (permalink / raw)
  To: ChiaWei Wang, robh+dt, joel, andrew, lee.jones, osk, devicetree,
	linux-arm-kernel, linux-aspeed, linux-kernel, openbmc

This email was mistakenly sent.
Please ignore this one and check "[PATCH v2 2/3] soc: aspeed: Add UART routing support" instead.
Thanks.

Chiawei

> From: openbmc
> Sent: Thursday, September 2, 2021 10:18 AM
> 
> Add driver support for the LPC UART routing control. Users can perform
> runtime configuration of the RX muxes among the UART controllers and the
> UART IO pins.
> 
> A sysfs interface is also exported for the convenience of routing paths check
> and configuration.
> 
> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> ---
>  .../testing/sysfs-driver-aspeed-uart-routing  |  15 +
>  drivers/soc/aspeed/Kconfig                    |  10 +
>  drivers/soc/aspeed/Makefile                   |   9 +-
>  drivers/soc/aspeed/aspeed-uart-routing.c      | 601 ++++++++++++++++++
>  4 files changed, 631 insertions(+), 4 deletions(-)  create mode 100644
> Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
>  create mode 100644 drivers/soc/aspeed/aspeed-uart-routing.c
> 
> diff --git a/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
> b/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
> new file mode 100644
> index 000000000000..65f899f1f055
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
> @@ -0,0 +1,15 @@
> +What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/uart*
> +Date:		September 2021
> +Contact:	Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> +Description:	Selects the RX source of the UARTx device. The current
> +		selection will be marked with the '[]' brackets.
> +Users:		OpenBMC.  Proposed changes should be mailed to
> +		openbmc@lists.ozlabs.org
> +
> +What:		/sys/bus/platform/drivers/aspeed-uart-routing/*/io*
> +Date:		September 2021
> +Contact:	Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> +Description:	Selects the RX source of IOx pins. The current selection
> +		will be marked with the '[]' brackets.
> +Users:		OpenBMC.  Proposed changes should be mailed to
> +		openbmc@lists.ozlabs.org
> diff --git a/drivers/soc/aspeed/Kconfig b/drivers/soc/aspeed/Kconfig index
> 243ca196e6ad..f579ee0b5afa 100644
> --- a/drivers/soc/aspeed/Kconfig
> +++ b/drivers/soc/aspeed/Kconfig
> @@ -24,6 +24,16 @@ config ASPEED_LPC_SNOOP
>  	  allows the BMC to listen on and save the data written by
>  	  the host to an arbitrary LPC I/O port.
> 
> +config ASPEED_UART_ROUTING
> +	tristate "ASPEED uart routing control"
> +	select REGMAP
> +	select MFD_SYSCON
> +	default ARCH_ASPEED
> +	help
> +	  Provides a driver to control the UART routing paths, allowing
> +	  users to perform runtime configuration of the RX muxes among
> +	  the UART controllers and I/O pins.
> +
>  config ASPEED_P2A_CTRL
>  	tristate "ASPEED P2A (VGA MMIO to BMC) bridge control"
>  	select REGMAP
> diff --git a/drivers/soc/aspeed/Makefile b/drivers/soc/aspeed/Makefile index
> fcab7192e1a4..b35d74592964 100644
> --- a/drivers/soc/aspeed/Makefile
> +++ b/drivers/soc/aspeed/Makefile
> @@ -1,5 +1,6 @@
>  # SPDX-License-Identifier: GPL-2.0-only
> -obj-$(CONFIG_ASPEED_LPC_CTRL)	+= aspeed-lpc-ctrl.o
> -obj-$(CONFIG_ASPEED_LPC_SNOOP)	+= aspeed-lpc-snoop.o
> -obj-$(CONFIG_ASPEED_P2A_CTRL)	+= aspeed-p2a-ctrl.o
> -obj-$(CONFIG_ASPEED_SOCINFO)	+= aspeed-socinfo.o
> +obj-$(CONFIG_ASPEED_LPC_CTRL)		+= aspeed-lpc-ctrl.o
> +obj-$(CONFIG_ASPEED_LPC_SNOOP)		+= aspeed-lpc-snoop.o
> +obj-$(CONFIG_ASPEED_UART_ROUTING)	+= aspeed-uart-routing.o
> +obj-$(CONFIG_ASPEED_P2A_CTRL)		+= aspeed-p2a-ctrl.o
> +obj-$(CONFIG_ASPEED_SOCINFO)		+= aspeed-socinfo.o
> diff --git a/drivers/soc/aspeed/aspeed-uart-routing.c
> b/drivers/soc/aspeed/aspeed-uart-routing.c
> new file mode 100644
> index 000000000000..eba6dfebb54f
> --- /dev/null
> +++ b/drivers/soc/aspeed/aspeed-uart-routing.c
> @@ -0,0 +1,601 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (c) 2018 Google LLC
> + * Copyright (c) 2021 Aspeed Technology Inc.
> + */
> +#include <linux/device.h>
> +#include <linux/module.h>
> +#include <linux/of_device.h>
> +#include <linux/of_platform.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/regmap.h>
> +#include <linux/platform_device.h>
> +
> +/* register offsets */
> +#define HICR9	0x98
> +#define HICRA	0x9c
> +
> +/* attributes options */
> +#define UART_ROUTING_IO1	"io1"
> +#define UART_ROUTING_IO2	"io2"
> +#define UART_ROUTING_IO3	"io3"
> +#define UART_ROUTING_IO4	"io4"
> +#define UART_ROUTING_IO5	"io5"
> +#define UART_ROUTING_IO6	"io6"
> +#define UART_ROUTING_IO10	"io10"
> +#define UART_ROUTING_UART1	"uart1"
> +#define UART_ROUTING_UART2	"uart2"
> +#define UART_ROUTING_UART3	"uart3"
> +#define UART_ROUTING_UART4	"uart4"
> +#define UART_ROUTING_UART5	"uart5"
> +#define UART_ROUTING_UART6	"uart6"
> +#define UART_ROUTING_UART10	"uart10"
> +#define UART_ROUTING_RES	"reserved"
> +
> +struct aspeed_uart_routing {
> +	struct regmap *map;
> +	struct attribute_group const *attr_grp; };
> +
> +struct aspeed_uart_routing_selector {
> +	struct device_attribute	dev_attr;
> +	uint8_t reg;
> +	uint8_t mask;
> +	uint8_t shift;
> +	const char *const options[];
> +};
> +
> +#define to_routing_selector(_dev_attr)					\
> +	container_of(_dev_attr, struct aspeed_uart_routing_selector, dev_attr)
> +
> +static ssize_t aspeed_uart_routing_show(struct device *dev,
> +					struct device_attribute *attr,
> +					char *buf);
> +
> +static ssize_t aspeed_uart_routing_store(struct device *dev,
> +					 struct device_attribute *attr,
> +					 const char *buf, size_t count);
> +
> +#define ROUTING_ATTR(_name) {					\
> +	.attr = {.name = _name,					\
> +		 .mode = VERIFY_OCTAL_PERMISSIONS(0644) },	\
> +	.show = aspeed_uart_routing_show,			\
> +	.store = aspeed_uart_routing_store,			\
> +}
> +
> +/* routing selector for AST25xx */
> +static struct aspeed_uart_routing_selector ast2500_io6_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO6),
> +	.reg = HICR9,
> +	.shift = 8,
> +	.mask = 0xf,
> +	.options = {
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART5,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO5,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_uart5_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART5),
> +	.reg = HICRA,
> +	.shift = 28,
> +	.mask = 0xf,
> +	.options = {
> +		    UART_ROUTING_IO5,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_uart4_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART4),
> +	.reg = HICRA,
> +	.shift = 25,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +	},
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_uart3_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART3),
> +	.reg = HICRA,
> +	.shift = 22,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_uart2_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART2),
> +	.reg = HICRA,
> +	.shift = 19,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_uart1_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART1),
> +	.reg = HICRA,
> +	.shift = 16,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_io5_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO5),
> +	.reg = HICRA,
> +	.shift = 12,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART5,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_io4_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO4),
> +	.reg = HICRA,
> +	.shift = 9,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART5,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_io3_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO3),
> +	.reg = HICRA,
> +	.shift = 6,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART5,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_io2_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO2),
> +	.reg = HICRA,
> +	.shift = 3,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART5,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2500_io1_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO1),
> +	.reg = HICRA,
> +	.shift = 0,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART5,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO6,
> +		    NULL,
> +		    },
> +};
> +
> +static struct attribute *ast2500_uart_routing_attrs[] = {
> +	&ast2500_io6_sel.dev_attr.attr,
> +	&ast2500_uart5_sel.dev_attr.attr,
> +	&ast2500_uart4_sel.dev_attr.attr,
> +	&ast2500_uart3_sel.dev_attr.attr,
> +	&ast2500_uart2_sel.dev_attr.attr,
> +	&ast2500_uart1_sel.dev_attr.attr,
> +	&ast2500_io5_sel.dev_attr.attr,
> +	&ast2500_io4_sel.dev_attr.attr,
> +	&ast2500_io3_sel.dev_attr.attr,
> +	&ast2500_io2_sel.dev_attr.attr,
> +	&ast2500_io1_sel.dev_attr.attr,
> +	NULL,
> +};
> +
> +static const struct attribute_group ast2500_uart_routing_attr_group = {
> +	.attrs = ast2500_uart_routing_attrs,
> +};
> +
> +/* routing selector for AST26xx */
> +static struct aspeed_uart_routing_selector ast2600_uart10_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART10),
> +	.reg = HICR9,
> +	.shift = 12,
> +	.mask = 0xf,
> +	.options = {
> +		    UART_ROUTING_IO10,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +			UART_ROUTING_RES,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_io10_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO10),
> +	.reg = HICR9,
> +	.shift = 8,
> +	.mask = 0xf,
> +	.options = {
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +			UART_ROUTING_RES,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +			UART_ROUTING_RES,
> +		    UART_ROUTING_UART10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_uart4_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART4),
> +	.reg = HICRA,
> +	.shift = 25,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +	},
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_uart3_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART3),
> +	.reg = HICRA,
> +	.shift = 22,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_uart2_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART2),
> +	.reg = HICRA,
> +	.shift = 19,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_uart1_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_UART1),
> +	.reg = HICRA,
> +	.shift = 16,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_io4_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO4),
> +	.reg = HICRA,
> +	.shift = 9,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART10,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_io3_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO3),
> +	.reg = HICRA,
> +	.shift = 6,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART10,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_IO1,
> +		    UART_ROUTING_IO2,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_io2_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO2),
> +	.reg = HICRA,
> +	.shift = 3,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART10,
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct aspeed_uart_routing_selector ast2600_io1_sel = {
> +	.dev_attr = ROUTING_ATTR(UART_ROUTING_IO1),
> +	.reg = HICRA,
> +	.shift = 0,
> +	.mask = 0x7,
> +	.options = {
> +		    UART_ROUTING_UART1,
> +		    UART_ROUTING_UART2,
> +		    UART_ROUTING_UART3,
> +		    UART_ROUTING_UART4,
> +		    UART_ROUTING_UART10,
> +		    UART_ROUTING_IO3,
> +		    UART_ROUTING_IO4,
> +		    UART_ROUTING_IO10,
> +		    NULL,
> +		    },
> +};
> +
> +static struct attribute *ast2600_uart_routing_attrs[] = {
> +	&ast2600_uart10_sel.dev_attr.attr,
> +	&ast2600_io10_sel.dev_attr.attr,
> +	&ast2600_uart4_sel.dev_attr.attr,
> +	&ast2600_uart3_sel.dev_attr.attr,
> +	&ast2600_uart2_sel.dev_attr.attr,
> +	&ast2600_uart1_sel.dev_attr.attr,
> +	&ast2600_io4_sel.dev_attr.attr,
> +	&ast2600_io3_sel.dev_attr.attr,
> +	&ast2600_io2_sel.dev_attr.attr,
> +	&ast2600_io1_sel.dev_attr.attr,
> +	NULL,
> +};
> +
> +static const struct attribute_group ast2600_uart_routing_attr_group = {
> +	.attrs = ast2600_uart_routing_attrs,
> +};
> +
> +static ssize_t aspeed_uart_routing_show(struct device *dev,
> +					struct device_attribute *attr,
> +					char *buf)
> +{
> +	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
> +	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
> +	int val, pos, len;
> +
> +	regmap_read(uart_routing->map, sel->reg, &val);
> +	val = (val >> sel->shift) & sel->mask;
> +
> +	len = 0;
> +	for (pos = 0; sel->options[pos] != NULL; ++pos) {
> +		if (pos == val)
> +			len += sysfs_emit_at(buf, len, "[%s] ", sel->options[pos]);
> +		else
> +			len += sysfs_emit_at(buf, len, "%s ", sel->options[pos]);
> +	}
> +
> +	if (val >= pos)
> +		len += sysfs_emit_at(buf, len, "[unknown(%d)]", val);
> +
> +	len += sysfs_emit_at(buf, len, "\n");
> +
> +	return len;
> +}
> +
> +static ssize_t aspeed_uart_routing_store(struct device *dev,
> +					 struct device_attribute *attr,
> +					 const char *buf, size_t count)
> +{
> +	struct aspeed_uart_routing *uart_routing = dev_get_drvdata(dev);
> +	struct aspeed_uart_routing_selector *sel = to_routing_selector(attr);
> +	int val;
> +
> +	val = match_string(sel->options, -1, buf);
> +	if (val < 0) {
> +		dev_err(dev, "invalid value \"%s\"\n", buf);
> +		return -EINVAL;
> +	}
> +
> +	regmap_update_bits(uart_routing->map, sel->reg,
> +			(sel->mask << sel->shift),
> +			(val & sel->mask) << sel->shift);
> +
> +	return count;
> +}
> +
> +static int aspeed_uart_routing_probe(struct platform_device *pdev) {
> +	int rc;
> +	struct device *dev = &pdev->dev;
> +	struct aspeed_uart_routing *uart_routing;
> +
> +	uart_routing = devm_kzalloc(&pdev->dev, sizeof(*uart_routing),
> GFP_KERNEL);
> +	if (!uart_routing)
> +		return -ENOMEM;
> +
> +	uart_routing->map = syscon_node_to_regmap(dev->parent->of_node);
> +	if (IS_ERR(uart_routing->map)) {
> +		dev_err(dev, "cannot get regmap\n");
> +		return PTR_ERR(uart_routing->map);
> +	}
> +
> +	uart_routing->attr_grp = of_device_get_match_data(dev);
> +
> +	rc = sysfs_create_group(&dev->kobj, uart_routing->attr_grp);
> +	if (rc < 0)
> +		return rc;
> +
> +	dev_set_drvdata(dev, uart_routing);
> +
> +	dev_info(dev, "module loaded\n");
> +
> +	return 0;
> +}
> +
> +static int aspeed_uart_routing_remove(struct platform_device *pdev) {
> +	struct device *dev = &pdev->dev;
> +	struct aspeed_uart_routing *uart_routing = platform_get_drvdata(pdev);
> +
> +	sysfs_remove_group(&dev->kobj, uart_routing->attr_grp);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id aspeed_uart_routing_table[] = {
> +	{ .compatible = "aspeed,ast2500-uart-routing",
> +	  .data = &ast2500_uart_routing_attr_group },
> +	{ .compatible = "aspeed,ast2600-uart-routing",
> +	  .data = &ast2600_uart_routing_attr_group },
> +	{ },
> +};
> +
> +static struct platform_driver aspeed_uart_routing_driver = {
> +	.driver = {
> +		.name = "aspeed-uart-routing",
> +		.of_match_table = aspeed_uart_routing_table,
> +	},
> +	.probe = aspeed_uart_routing_probe,
> +	.remove = aspeed_uart_routing_remove,
> +};
> +
> +module_platform_driver(aspeed_uart_routing_driver);
> +
> +MODULE_AUTHOR("Oskar Senft <osk@google.com>");
> MODULE_AUTHOR("Chia-Wei
> +Wang <chiawei_wang@aspeedtech.com>"); MODULE_LICENSE("GPL v2");
> +MODULE_DESCRIPTION("Driver to configure Aspeed UART routing");
> --
> 2.17.1


^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string
  2021-09-02  2:18 ` [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Chia-Wei Wang
@ 2021-09-07 18:46   ` Rob Herring
  2021-09-08  5:06     ` ChiaWei Wang
  0 siblings, 1 reply; 15+ messages in thread
From: Rob Herring @ 2021-09-07 18:46 UTC (permalink / raw)
  To: Chia-Wei Wang
  Cc: devicetree, linux-aspeed, andrew, openbmc, linux-kernel,
	lee.jones, linux-arm-kernel, osk

On Thu, Sep 02, 2021 at 10:18:14AM +0800, Chia-Wei Wang wrote:
> Add the compatible string and the device tree description for the
> Aspeed AST25xx/AST26xx UART routing control.
> 
> Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> ---
>  .../devicetree/bindings/mfd/aspeed-lpc.txt    | 22 +++++++++++++++++++
>  1 file changed, 22 insertions(+)

Either convert aspeed-lpc.txt to DT schema or make this a separate 
schema doc.

> 
> diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> index 936aa108eab4..45d44f812e5e 100644
> --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> @@ -155,3 +155,25 @@ lpc_reset: reset-controller@98 {
>          reg = <0x98 0x4>;
>          #reset-cells = <1>;
>  };
> +
> +UART routing control
> +--------------------
> +
> +The UART routing control manages the RX muxes among the UART controllers
> +and the I/O pins. This is typicall used for the Serial-Over-Lan (SOL)
> +service.
> +
> +Required properties:
> +
> + - compatible:		One of:
> +			"aspeed,ast2500-uart-routing";
> +			"aspeed,ast2600-uart-routing";
> +
> + - reg:			offset and length of the IP in the LPC memory region
> +
> +Example:
> +
> +uart_routing: uart-routing@98 {
> +	compatible = "aspeed,ast2600-uart-routing";
> +	reg = <0x98 0x8>;
> +};
> -- 
> 2.17.1
> 
> 

^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string
  2021-09-07 18:46   ` Rob Herring
@ 2021-09-08  5:06     ` ChiaWei Wang
  0 siblings, 0 replies; 15+ messages in thread
From: ChiaWei Wang @ 2021-09-08  5:06 UTC (permalink / raw)
  To: Rob Herring
  Cc: devicetree, linux-aspeed, andrew, openbmc, linux-kernel,
	lee.jones, linux-arm-kernel, osk

> From: Rob Herring <robh@kernel.org>
> Sent: Wednesday, September 8, 2021 2:47 AM
> 
> On Thu, Sep 02, 2021 at 10:18:14AM +0800, Chia-Wei Wang wrote:
> > Add the compatible string and the device tree description for the
> > Aspeed AST25xx/AST26xx UART routing control.
> >
> > Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
> > ---
> >  .../devicetree/bindings/mfd/aspeed-lpc.txt    | 22 +++++++++++++++++++
> >  1 file changed, 22 insertions(+)
> 
> Either convert aspeed-lpc.txt to DT schema or make this a separate schema
> doc.

I will send a v3 patch with a separate schema included. Thanks.

Chiawei

> 
> >
> > diff --git a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > index 936aa108eab4..45d44f812e5e 100644
> > --- a/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > +++ b/Documentation/devicetree/bindings/mfd/aspeed-lpc.txt
> > @@ -155,3 +155,25 @@ lpc_reset: reset-controller@98 {
> >          reg = <0x98 0x4>;
> >          #reset-cells = <1>;
> >  };
> > +
> > +UART routing control
> > +--------------------
> > +
> > +The UART routing control manages the RX muxes among the UART
> > +controllers and the I/O pins. This is typicall used for the
> > +Serial-Over-Lan (SOL) service.
> > +
> > +Required properties:
> > +
> > + - compatible:		One of:
> > +			"aspeed,ast2500-uart-routing";
> > +			"aspeed,ast2600-uart-routing";
> > +
> > + - reg:			offset and length of the IP in the LPC memory region
> > +
> > +Example:
> > +
> > +uart_routing: uart-routing@98 {
> > +	compatible = "aspeed,ast2600-uart-routing";
> > +	reg = <0x98 0x8>;
> > +};
> > --
> > 2.17.1
> >
> >

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support
  2021-09-02  2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang
                   ` (3 preceding siblings ...)
  2021-09-02  2:18 ` [PATCH v2 3/3] ARM: dts: aspeed: Add uart routing to device tree Chia-Wei Wang
@ 2021-09-08  9:42 ` Paul Fertser
  2021-09-08 10:18   ` ChiaWei Wang
  2021-09-09  6:52 ` [External] " Lei Yu
  5 siblings, 1 reply; 15+ messages in thread
From: Paul Fertser @ 2021-09-08  9:42 UTC (permalink / raw)
  To: Chia-Wei Wang
  Cc: devicetree, linux-aspeed, andrew, openbmc, linux-kernel,
	Konstantin Klubnichkin, robh+dt, lee.jones, linux-arm-kernel,
	osk

Hello,

On Thu, Sep 02, 2021 at 10:18:13AM +0800, Chia-Wei Wang wrote:
> Add UART routing driver and the device tree nodes.

Thank you for working on exposing this functionality in upstreamable
way, that's so much better than all the register-level hacks in U-Boot
and similar approaches!


One (somewhat) related question that I hope you do not mind answering:
is there anything special regarding the routing or other configuration
that needs to be done for VUART to work with IRQs?

The reason I ask is that I have tried hard (and I know several other
developers who have too) to use VUART functionality but somehow as
soon as Linux was booting on host and starting to use the IRQ-based
16550 driver the communication was halted both ways. Basically, the
BMC firmware was enabling VUART in DTS, then setting LPC address to
0x3F8 and LPC IRQ to 4 and reading/writing using the corresponding
/dev/ttyS* node. The datasheet is not clearly telling what other
actions need to be performed for this to work. Not using VUART and
instead routing UART1 lines with exactly the same pinctrl/pinmux
worked just fine. One detail is that with VUART the host wasn't seeing
new interrupts but when they were simulated by exporting the LPC
interrupt pin via /sys/class/gpio and toggling it manually the data
was getting through.

Does UART1 need some explicit disabling for VUART IRQs to work? It
looks like setting LPC address and IRQ number in VUART is enough to
override the register part but probably not for the interrupt?

-- 
Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software!
mailto:fercerpav@gmail.com

^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: [PATCH v2 0/3] arm: aspeed: Add UART routing support
  2021-09-08  9:42 ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Paul Fertser
@ 2021-09-08 10:18   ` ChiaWei Wang
  2021-09-08 10:52     ` Paul Fertser
  0 siblings, 1 reply; 15+ messages in thread
From: ChiaWei Wang @ 2021-09-08 10:18 UTC (permalink / raw)
  To: Paul Fertser
  Cc: devicetree, linux-aspeed, andrew, openbmc, linux-kernel,
	Konstantin Klubnichkin, robh+dt, lee.jones, linux-arm-kernel,
	osk

Hi Paul,

> From: Paul Fertser <fercerpav@gmail.com>
> Sent: Wednesday, September 8, 2021 5:43 PM
> 
> Hello,
> 
> On Thu, Sep 02, 2021 at 10:18:13AM +0800, Chia-Wei Wang wrote:
> > Add UART routing driver and the device tree nodes.
> 
> Thank you for working on exposing this functionality in upstreamable way,
> that's so much better than all the register-level hacks in U-Boot and similar
> approaches!
> 
> 
> One (somewhat) related question that I hope you do not mind answering:
> is there anything special regarding the routing or other configuration that
> needs to be done for VUART to work with IRQs?

No. The routing control has no relation to VUART.

> 
> The reason I ask is that I have tried hard (and I know several other developers
> who have too) to use VUART functionality but somehow as soon as Linux was
> booting on host and starting to use the IRQ-based
> 16550 driver the communication was halted both ways. Basically, the BMC
> firmware was enabling VUART in DTS, then setting LPC address to
> 0x3F8 and LPC IRQ to 4 and reading/writing using the corresponding
> /dev/ttyS* node. The datasheet is not clearly telling what other actions need to
> be performed for this to work. Not using VUART and instead routing UART1
> lines with exactly the same pinctrl/pinmux worked just fine. One detail is that
> with VUART the host wasn't seeing new interrupts but when they were
> simulated by exporting the LPC interrupt pin via /sys/class/gpio and toggling it
> manually the data was getting through.
> 
> Does UART1 need some explicit disabling for VUART IRQs to work? It looks like
> setting LPC address and IRQ number in VUART is enough to override the
> register part but probably not for the interrupt?

You may need to confirm that the Host does not enable the SIO SUART1 device.
This will conflict with VUART as both SUART and VAURT are competing for the port address 0x3f8 and SIRQ 4.

> 
> --
> Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software!
> mailto:fercerpav@gmail.com

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support
  2021-09-08 10:18   ` ChiaWei Wang
@ 2021-09-08 10:52     ` Paul Fertser
  2021-09-08 11:27       ` VUART compatibility (was: Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support) Paul Fertser
  2021-09-08 13:19       ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Oskar Senft
  0 siblings, 2 replies; 15+ messages in thread
From: Paul Fertser @ 2021-09-08 10:52 UTC (permalink / raw)
  To: ChiaWei Wang
  Cc: devicetree, linux-aspeed, andrew, openbmc, linux-kernel,
	Konstantin Klubnichkin, robh+dt, lee.jones, linux-arm-kernel,
	osk

On Wed, Sep 08, 2021 at 10:18:35AM +0000, ChiaWei Wang wrote:
> > Does UART1 need some explicit disabling for VUART IRQs to work? It looks like
> > setting LPC address and IRQ number in VUART is enough to override the
> > register part but probably not for the interrupt?
> 
> You may need to confirm that the Host does not enable the SIO SUART1
> device. This will conflict with VUART as both SUART and VAURT are
> competing for the port address 0x3f8 and SIRQ 4.

Do you really mean the Host here, that is, software that controls LPC
master when ASpeed is used as an LPC slave? Linux driver is not doing
anything special with the UART1, it's just trying to use it as if it
was a hardware 16550A physical IC on I/O bus.

Or do you mean the BMC software shouldn't be enabling SUART1 by making
sure its clock is disabled in SCU0C? Is there anything else needed?
I've tried reading the ast2500 datasheet many times but this detail
seem to be missing. Is there some appnote on the topic probably?

In this case do we have some way to make it an obvious error to enable
both SUART1 and VUART in DTS? If they're conflicting surely there
should be a way to express that?

Thank you for looking into this!

-- 
Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software!
mailto:fercerpav@gmail.com

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: VUART compatibility (was: Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support)
  2021-09-08 10:52     ` Paul Fertser
@ 2021-09-08 11:27       ` Paul Fertser
  2021-09-08 13:19       ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Oskar Senft
  1 sibling, 0 replies; 15+ messages in thread
From: Paul Fertser @ 2021-09-08 11:27 UTC (permalink / raw)
  To: ChiaWei Wang
  Cc: devicetree, linux-aspeed, andrew, openbmc, linux-kernel,
	Konstantin Klubnichkin, robh+dt, lee.jones, linux-arm-kernel,
	osk

On Wed, Sep 08, 2021 at 01:52:45PM +0300, Paul Fertser wrote:
> In this case do we have some way to make it an obvious error to enable
> both SUART1 and VUART in DTS? If they're conflicting surely there
> should be a way to express that?

I have to add this idea is obviously silly as we have sysfs nodes to
specify both LPC I/O address and interrupt number for VUART and
arbitrary numbers are allowed (so it can conflict with any of the
SUART port) so there should be probably some runtime checking in VUART
driver to prevent that?

-- 
Be free, use free (http://www.gnu.org/philosophy/free-sw.html) software!
mailto:fercerpav@gmail.com

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support
  2021-09-08 10:52     ` Paul Fertser
  2021-09-08 11:27       ` VUART compatibility (was: Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support) Paul Fertser
@ 2021-09-08 13:19       ` Oskar Senft
  1 sibling, 0 replies; 15+ messages in thread
From: Oskar Senft @ 2021-09-08 13:19 UTC (permalink / raw)
  To: Paul Fertser
  Cc: devicetree, linux-aspeed, andrew, ChiaWei Wang, linux-kernel,
	Konstantin Klubnichkin, robh+dt, lee.jones, openbmc,
	linux-arm-kernel

Hey Paul

> Or do you mean the BMC software shouldn't be enabling SUART1 by making
> sure its clock is disabled in SCU0C? Is there anything else needed?
> I've tried reading the ast2500 datasheet many times but this detail
> seem to be missing. Is there some appnote on the topic probably?

I ran into this issue a while ago.

As ChiaWei explained, the issue is that there are TWO implementations
of a host-facing UART in the Aspeed:

1) SuperIO (aka "SIO"), which includes two UARTS (and some other stuff).
The SIO is fully controlled by the host. The BMC has no ability to
configure the SIO. Of course, it can disable it by stopping its clocks
or by blocking access from the host to it. But it cannot observe or
modify the settings that the host made. The SIO is functionally very
similar to the SIOs that were around 20+ years ago.

With that, it's the host's (i.e. BIOS's) responsibility to detect the
presence of the SIO and to configure its UART with port (e.g. 0x3f8)
and interrupt (e.g. 0x4). The SIO in the BMC will just take this
configuration "no questions asked" and make the UART accessible on LPC
for the host to communicate with. The BIOS also registers the UART in
the SMBIOS and ACPI tables where the OS learns about its existence to
load the correct driver.

The SuperIO's UART actually generates/receives serial UART signals on
a 3-wire interface (TX, RX, GND) at the configured speed. This signal
can then be routed (there are a bunch of muxes in the Aspeed) either
to another UART (which the BMC can control) or to a physical serial
port (i.e. a D-Sub 9 or a header on the mainboard). The default
configuration is for UART1 and UART2 (both of which are controlled by
the SIO) to be routed to physical serial ports.

The big problem with SIO in AST2400 / AST2500 is CVE-2019-6260. As I
understand it, in order to expose the SIO to the host, a number of
interfaces need to be enabled that ultimately allow the host to
perform other operations that are undesirable wrt. BMC security.
Please correct me if I'm wrong.


2) VUART ("Virtual UART")
The VUART is "virtual", since it does not actually generate serial
UART signals. Instead the VUART really is two "half UARTs" connected
with each other. One half is connected to LPC to be used by the host,
the other is accessible from the BMC. They both expose the UART
programming interface which allows both the host and the BMC  to use
standard serial port drivers. There's no configurable routing for the
VUART. Whatever the "port speed" that's configured by host or BMC, the
VUART always runs at "maximum speed", i.e. bytes written to the UART
on one end are accessible "immediately" on the other end (of course
there's a maximum "baud rate" there, but that's not due to an actual
serial UART signal.

The big difference with VUART is that the "host settings" (i.e. port
and interrupt) are fully controlled by the BMC. This requires a change
in the host's BIOS, as it should no longer attempt to detect and
configure the SIO and instead just expect a UART to be present at a
predetermined address. For the BIOS that I worked with, this required
to build and include a different module that performs the necessary
initialization on the host side (e.g. configure the LPC bridge to
forward requests to the specified port and accept an incoming
interrupt) and to store the serial port in the SMBIOS and ACPI tables
for the OS to "detect" it from.

Now, if SIO is enabled on the BMC side and the host side AND if also
VUART is enabled and configured on the BMC side, this may result in
TWO devices listening on the port and possibly attempting to issue
interrupts. I'm not sure what mechanism the Aspeed uses to prevent
both the SIO's UART and the VUART to respond at the same time on the
same address.


Also note that there's host-side setting for LPC interrupts ("LPC
IRQSER"), which can either be "quiet" or "continuous" mode, with a HW
default on the host of "quiet" mode; see Intel C620 datasheet, p.
1544, when setting the Enable (EN, bit 7) bit in the Serial IRQ
Control register (SCNT, offset 0x64), the Mode (MD, bit 6) bit should
be set to enable "continuous mode". However, the Aspeed's default is
"continuous" (not sure if it supports "quiet" mode). This results in
the Aspeed not being able to send interrupts to the host.


> In this case do we have some way to make it an obvious error to enable
> both SUART1 and VUART in DTS? If they're conflicting surely there
> should be a way to express that?
No, I don't think we should try to employ any "smarts" here, as
ultimately the behavior is caused by a combination of enabled BMC
features (SIO) and host (BIOS) behavior.


I hope that clears it up a little? I'm happy to explain more if needed.

Thanks
Oskar.

^ permalink raw reply	[flat|nested] 15+ messages in thread

* Re: [External] [PATCH v2 0/3] arm: aspeed: Add UART routing support
  2021-09-02  2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang
                   ` (4 preceding siblings ...)
  2021-09-08  9:42 ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Paul Fertser
@ 2021-09-09  6:52 ` Lei Yu
  2021-09-09  8:32   ` ChiaWei Wang
  5 siblings, 1 reply; 15+ messages in thread
From: Lei Yu @ 2021-09-09  6:52 UTC (permalink / raw)
  To: Chia-Wei Wang
  Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ASPEED MACHINE SUPPORT, Andrew Jeffery,
	openbmc, open list, Rob Herring, lee.jones,
	moderated list:ARM/ASPEED MACHINE SUPPORT, Oskar Senft

The patches are tested on meta-g220a build and it works fine with some
changes in the sysfs path[1].

Tested-by: Lei YU <yulei.sh@bytedance.com>

[1]: https://github.com/openbmc/meta-bytedance/blob/master/meta-g220a/recipes-phosphor/console/obmc-console/obmc-console%40.service#L7-L10

On Thu, Sep 2, 2021 at 10:20 AM Chia-Wei Wang
<chiawei_wang@aspeedtech.com> wrote:
>
> Add UART routing driver and the device tree nodes.
>
> v2:
>  - Add dt-bindings
>  - Add ABI documents for the exported sysfs interface
>  - Revise driver implementation suggested by Joel
>
> Chia-Wei Wang (3):
>   dt-bindings: aspeed-lpc: Add UART routing compatible string
>   soc: aspeed: Add UART routing support
>   ARM: dts: aspeed: Add uart routing to device tree
>
>  .../testing/sysfs-driver-aspeed-uart-routing  |  15 +
>  .../devicetree/bindings/mfd/aspeed-lpc.txt    |  22 +
>  arch/arm/boot/dts/aspeed-g5.dtsi              |   6 +
>  arch/arm/boot/dts/aspeed-g6.dtsi              |   6 +
>  drivers/soc/aspeed/Kconfig                    |  10 +
>  drivers/soc/aspeed/Makefile                   |   9 +-
>  drivers/soc/aspeed/aspeed-uart-routing.c      | 601 ++++++++++++++++++
>  7 files changed, 665 insertions(+), 4 deletions(-)
>  create mode 100644 Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
>  create mode 100644 drivers/soc/aspeed/aspeed-uart-routing.c
>
> --
> 2.17.1
>


-- 
BRs,
Lei YU

^ permalink raw reply	[flat|nested] 15+ messages in thread

* RE: [External] [PATCH v2 0/3] arm: aspeed: Add UART routing support
  2021-09-09  6:52 ` [External] " Lei Yu
@ 2021-09-09  8:32   ` ChiaWei Wang
  0 siblings, 0 replies; 15+ messages in thread
From: ChiaWei Wang @ 2021-09-09  8:32 UTC (permalink / raw)
  To: Lei Yu
  Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
	moderated list:ARM/ASPEED MACHINE SUPPORT, Andrew Jeffery,
	openbmc, open list, Rob Herring, lee.jones,
	moderated list:ARM/ASPEED MACHINE SUPPORT, Oskar Senft

Hi Lei,

Thanks for the Tested-by tag.
Will include it in the upcoming v3 patch.

> From: Lei Yu <yulei.sh@bytedance.com>
> Sent: Thursday, September 9, 2021 2:52 PM
> 
> The patches are tested on meta-g220a build and it works fine with some
> changes in the sysfs path[1].
> 
> Tested-by: Lei YU <yulei.sh@bytedance.com>
> 
> [1]:
> https://github.com/openbmc/meta-bytedance/blob/master/meta-g220a/recip
> es-phosphor/console/obmc-console/obmc-console%40.service#L7-L10
> 
> On Thu, Sep 2, 2021 at 10:20 AM Chia-Wei Wang
> <chiawei_wang@aspeedtech.com> wrote:
> >
> > Add UART routing driver and the device tree nodes.
> >
> > v2:
> >  - Add dt-bindings
> >  - Add ABI documents for the exported sysfs interface
> >  - Revise driver implementation suggested by Joel
> >
> > Chia-Wei Wang (3):
> >   dt-bindings: aspeed-lpc: Add UART routing compatible string
> >   soc: aspeed: Add UART routing support
> >   ARM: dts: aspeed: Add uart routing to device tree
> >
> >  .../testing/sysfs-driver-aspeed-uart-routing  |  15 +
> >  .../devicetree/bindings/mfd/aspeed-lpc.txt    |  22 +
> >  arch/arm/boot/dts/aspeed-g5.dtsi              |   6 +
> >  arch/arm/boot/dts/aspeed-g6.dtsi              |   6 +
> >  drivers/soc/aspeed/Kconfig                    |  10 +
> >  drivers/soc/aspeed/Makefile                   |   9 +-
> >  drivers/soc/aspeed/aspeed-uart-routing.c      | 601
> ++++++++++++++++++
> >  7 files changed, 665 insertions(+), 4 deletions(-)  create mode
> > 100644 Documentation/ABI/testing/sysfs-driver-aspeed-uart-routing
> >  create mode 100644 drivers/soc/aspeed/aspeed-uart-routing.c
> >
> > --
> > 2.17.1
> >
> 
> 
> --
> BRs,
> Lei YU

^ permalink raw reply	[flat|nested] 15+ messages in thread

end of thread, other threads:[~2021-09-09  8:33 UTC | newest]

Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-09-02  2:18 [PATCH v2 0/3] arm: aspeed: Add UART routing support Chia-Wei Wang
2021-09-02  2:18 ` [PATCH v2 1/3] dt-bindings: aspeed-lpc: Add UART routing compatible string Chia-Wei Wang
2021-09-07 18:46   ` Rob Herring
2021-09-08  5:06     ` ChiaWei Wang
2021-09-02  2:18 ` [PATCH v2 2/3] soc: aspeed: Add LPC UART routing support Chia-Wei Wang
2021-09-02  2:25   ` ChiaWei Wang
2021-09-02  2:18 ` [PATCH v2 2/3] soc: aspeed: Add " Chia-Wei Wang
2021-09-02  2:18 ` [PATCH v2 3/3] ARM: dts: aspeed: Add uart routing to device tree Chia-Wei Wang
2021-09-08  9:42 ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Paul Fertser
2021-09-08 10:18   ` ChiaWei Wang
2021-09-08 10:52     ` Paul Fertser
2021-09-08 11:27       ` VUART compatibility (was: Re: [PATCH v2 0/3] arm: aspeed: Add UART routing support) Paul Fertser
2021-09-08 13:19       ` [PATCH v2 0/3] arm: aspeed: Add UART routing support Oskar Senft
2021-09-09  6:52 ` [External] " Lei Yu
2021-09-09  8:32   ` ChiaWei Wang

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).